This answer record contains the Release Notes and Known Issues for the MIPI CSI-2 Transmitter (TX) Subsystem and includes the following:
MIPI CSI-2 Transmitter (TX) Subsystem Page:
https://www.xilinx.com/products/intellectual-property/ef-di-mipi-csi-rx.html
Xilinx Forums:
Please seek technical support via the Video IP Board. The Xilinx Forums are a great resource for technical support.
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General Information
Supported Devices can be found in the following three locations:
For a list of new features and added device support for all versions:
Version Table
This table correlates the core version to the first Vivado design tools release version in which it was included.
Table 1: Version
| Core Version | Vivado Tools Version | IP Change log | IP Patches |
|---|---|---|---|
| v2.2 | 2020.2 | (Xilinx Answer 75786) | |
| v2.1 | 2020.1 | (Xilinx Answer 73626) | |
| v2.0 (Rev 7) | 2019.2 | (Xilinx Answer 72923) | |
| v2.0 (Rev 6) | 2019.1.1 | (Xilinx Answer 72494) | (Xilinx Answer 72562) |
| v2.0 (Rev 5) | 2019.1 | (Xilinx Answer 72242) | |
| v2.0 (Rev 4) | 2018.3 | (Xilinx Answer 71806) | |
| v2.0 (Rev 3) | 2018.2 | (Xilinx Answer 71212) | |
| v2.0 (Rev. 2) | 2018.1 | (Xilinx Answer 70699) | |
| v2.0 (Rev. 1) | 2017.4 | (Xilinx Answer 70386) | |
| v2.0 | 2017.3 | (Xilinx Answer 69903) | |
| v1.0 (Rev. 3) | 2017.2 | (Xilinx Answer 69326) | |
| v1.0 (Rev. 2) | 2017.1 | (Xilinx Answer 69055) | (Xilinx Answer 69173) |
| v1.0 (Rev. 1) | 2016.4 | (Xilinx Answer 68369) | |
| v1.0 | 2016.3 | (Xilinx Answer 68021) |
General Guidance
The table below provides Answer Records for general guidance when using the MIPI CSI-2 Transmitter (TX) Subsystem.
Table 2: General Guidance
| Article Number | Article Title |
|---|---|
| (Xilinx Answer 76255) | How to configure the Word Count setting correctly |
| (Xilinx Answer 72563) | Why is Controller Ready not getting asserted when Deskew transmission is enabled for the MIPI CSI-2 TX Subsystem? |
| (Xilinx Answer 72018) | Why can the first Start-of-Frame (SoF) not be received by MIPI CSI-2 RX in the simulation? |
| (Xilinx Answer 72082) | MIPI CSI-2 Transmitter Subsystem sends 0x0000 as a checksum (CRC) during blanking period |
| (Xilinx Answer 69525) | How is the Frame End generated? |
| (Xilinx Answer 69474) | Why does the MIPI CSI-2 Transmitter Subsystem not send all of the data (Image data and/or Embedded non-image data) when a longer packet length setting is selected? |
Known and Resolved Issues
The following table provides known issues for the MIPI CSI-2 Transmitter (TX) Subsystem, starting with v1.0, initially released in Vivado 2016.3.
Note: The "Version Found" column lists the version where the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
Table 3: IP
| Article Number | Article Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 69250) | Why is the MIPI TX Clock/Data relationship not center-aligned for some line-rate configurations? | v1.0 (Rev. 2) | N/A |
Table 4: Software Drivers
| Article Number | Article Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 69649) | Why do I receive a BSP compilation message saying there is an error in the auto generated xparameters.h file? | v1.1 (Rev. 3) | v2.0 |
Revision History:
| 03/11/2021 | Added (Xilinx Answer 76255) |
| 12/10/2020 | Added IP version up to Vivado 2020.2 |
| 09/09/2020 | Added IP version up to Vivado 2020.1 |
| 11/13/2019 | Added IP version up to Vivado 2019.2 to the Version Table. Added (Xilinx Answer 72563), (Xilinx Answer 72562) |
| 06/21/2019 | Added (Xilinx Answer 72018) |
| 05/31/2018 | Added (Xilinx Answer 72082) |
| 04/13/2018 | Added (Xilinx Answer 69649) and (Xilinx Answer 69525) |
| 04/04/2018 | Added v2.0 (Rev. 2) to the Version Table |
| 02/20/2018 | Added v2.0 and v2.0 (Rev. 1) to the Version Table |
| 07/20/2017 | Added v1.0 (Rev. 3) to the Version Table and Added (Xilinx Answer 69474) |
| 06/05/2017 | Added (Xilinx Answer 69250) |
| 04/05/2017 | Added v1.0 (Rev. 1) and v1.0 (Rev. 2) to the Version Table |
| 10/05/2016 | Initial Release |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 56852 | Xilinx Multimedia, Video and Imaging Solution Center - Top Issues | N/A | N/A |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 65242 | MIPI CSI-2 Receiver Subsystem - Release Notes and Known Issues for the Vivado 2015.3 tool and later versions | N/A | N/A |
| 54550 | LogiCORE IP MIPI D-PHY - Release Notes and Known Issues for the Vivado 2015.3 tool and later versions | N/A | N/A |
| AR# 67896 | |
|---|---|
| 日期 | 06/29/2021 |
| 状态 | Active |
| Type | 版本说明 |
| 器件 | |
| IP | |