To identify the silicon on your VC707, please see (Xilinx Answer 37579).
To begin debugging a suspected hardware issue on the VC707, see (Xilinx Answer 51233) Virtex-7 FPGA VC707 Evaluation Kit - Board Debug Checklist.
To view the Design Advisories associated with the VC707, see (Xilinx Answer 53962) Design Advisory Master Answer Record for Virtex-7 FPGA VC707 Evaluation Kit.
The VC707 Board Debug Checklist and VC707 Design Advisory Master Answer Record form part of (Xilinx Answer 43745) Xilinx Boards and Kits Solution Center, which is available to address all questions related to Xilinx Boards and Kits.
Board/Kit Related Issues
(Xilinx Answer 37579) | What device do I have on my Xilinx Evaluation Kit? Is it Engineering Sample (ES) or Production Silicon? |
(Xilinx Answer 45380) | Development Boards - Xilinx PCIe form factor board TI power system cooling |
(Xilinx Answer 43514) | Development Boards - Device on board does not match schematic |
(Xilinx Answer 50596) | Xilinx Evaluation Kits, PCIe cards - CE requirements for PC test environment |
(Xilinx Answer 50804) | VC707 - HB bus signals on the FMC2 header |
(Xilinx Answer 53870) | Virtex-7 FPGA VC707 Evaluation Kit - USB drive no longer provided in the box |
(Xilinx Answer 54022) | How can I order TI USB Interface Adapter EVM from Texas Instruments? |
(Xilinx Answer 55805) | Xilinx Evaluation Kits - Board becomes non-operational when TI USB Interface EVM is attached |
(Xilinx Answer 56811) | Xilinx Evaluation Kits - How do I reprogram the TI power controllers on my board to the factory defaults? |
(Xilinx Answer 59752) | Virtex-7 FPGA VC707 Evaluation Kit - PCB Revision Differences |
(Xilinx Answer 61849) | 6 Series and 7 Series Xilinx Evaluation Kits - Known Issues and Release Notes Master Answer Record for Texas Instruments Power Solution |
(Xilinx Answer 66509) | 7 Series and UltraScale Kits - Interaction with ADI AD9625-2.5EBZ FMC card |
(Xilinx Answer 67507) | Xilinx Boards and Kits - Power Supply Information |
Documentation Related Issues
Answer Record | Title | Version Found | Version Resolved |
---|---|---|---|
(Xilinx Answer 47347) | Virtex-7 FPGA VC707 Evaluation Kit - MGTVCCAUX Voltage Clarification | v1.0 | v1.1 |
(Xilinx Answer 50601) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.0) - Table 1-1 J37 FMC connector description incorrect | v1.0 | v1.1 |
(Xilinx Answer 46963) | Virtex-7 FPGA VC707 Evaluation Kit - PCIe Design Creation PDF (XTP144) Incorrect emcclk LOC constraint | ISE 13.4 | ISE 13.4 |
(Xilinx Answer 50110) | Virtex-7 FPGA VC707 - Master UCF (Rev 1.0) I/O Standard for USER_CLOCK Differential Pair | rev 1.0 | rev 2.0 |
(Xilinx Answer 51139) | VC707 UG885 (v1.0) - FPGA to LCD Header Connections | v1.0 | v1.1 |
(Xilinx Answer 52084) | VC707 Evaluation Board for the Virtex-7 FPGA User Guide (UG885) - SFP+ Module Connections | v1.1 | v1.2 |
(Xilinx Answer 52944) | UG885 (v1.1) - VC707 Evaluation Board for the Virtex-7 FPGA User Guide - HA pairs listed twice for FMC connectors | v1.1 | v1.2 |
(Xilinx Answer 54085) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.1) - Table 1-26 Directional Pushbutton Switches | v1.1 | v1.2 |
(Xilinx Answer 54086) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.1) - Table 1-11 GTX Interface Connections are incorrect | v1.1 | v1.2 |
(Xilinx Answer 54209) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.2) - EMCCLK settings for Linear BPI Flash Memory configuration incorrect | v1.2 | v1.3 |
(Xilinx Answer 58481) | Virtex-7 FPGA VC707 Evaluation Kit - What is the value of MGTVCCAUX on this board? | rev 1.0 | UG885 has correction rev 1.0 = never fix |
(Xilinx Answer 58658) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.3), Table 1-27 has incorrect FMC1 HPC connections | v1.3 | v1.4 |
(Xilinx Answer 58912) | Boards and Kits - Board files blocked on xilinx.com | ||
(Xilinx Answer 59548) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.3) - Table 1-27 FMC1_HPC_HA23_P / _N FPGA pinouts are incorrect | v1.3 | v1.4 |
(Xilinx Answer 63569) | UG885 (v1.5) VC707 Evaluation Board for the Virtex-7 FPGA User Guide - USER_CLK_SDL / SCL I2C Address | v1.5 | v1.6 |
(Xilinx Answer 66235) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.6.1) - Table 1-28 FMC HPC Connections pinouts are incorrect | v1.6.1 | v1.7 |
(Xilinx Answer 66686) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.6.1.) - GTX Interface Connections for FPGA U1 | v1.6.1 | v1.7 |
(Xilinx Answer 67572) | Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.7) - Table 1-5 U1 Pin for Flash address is incorrect | v1.7 | v1.7.1 |
PCI Express/IP Related Issues
(Xilinx Answer 40469) | 7 Series Integrated Block for PCI Express - Release Notes and Known Issues for All Versions up to Vivado 2012.4 and ISE 14.7 |
(Xilinx Answer 54643) | 7 Series Integrated Block for PCI Express - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions |
(Xilinx Answer 59167) | Design Advisory for MIG 7 Series DDR3 - Data rate specification changes for DIMM interfaces and data rate advisory for component interfaces |
Design Tools Related Issues
(Xilinx Answer 40905) | 7 Series - ISE 13.x Software Known Issues related to the 7 Series FPGAs |
(Xilinx Answer 44191) | 13.3 Kintex-7/Virtex-7, ChipScope IBERT - Using the KC705 or VC707 Board Configuration Settings file causes implementation error |
(Xilinx Answer 45648) | 13.1, 13.2, 13.3, 13.4, Virtex-7/Kintex-7 - Using KC705 or VC707 "Board Configuration Setting" in GTX IBERT uses incorrect I/O Standard for system clock |
(Xilinx Answer 46253) | ChipScope IBERT, Virtex-6, Kintex-7, Virtex-7 - 12 MHz cable speed does not work with IBERT |
(Xilinx Answer 47816) | 7 Series - ISE 14.x/Vivado 2012.2 Design Suite Known Issues Related to 7 Series FPGAs |
(Xilinx Answer 50886) | 14.2 Speed Files - Tactical Patch for 7 Series GES devices |
(Xilinx Answer 50906) | Design Advisory for Production Kintex-7 325T, 410T, 420T and Virtex-7 485XT - Bitstream compatibility requirements between GES and Production devices |
(Xilinx Answer 52368) | 14.3/2012.3 Speed Files - Tactical Patch for 7 Series GES -2 Devices |
(Xilinx Answer 55931) | Xilinx Evaluation Kits - What type of license is shipped with Xilinx Evaluation Kits? |
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
43750 | Xilinx 电路板和套件解决方案中心 — 热门问题 | N/A | N/A |
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
37579 | Which device do I have on my Xilinx Evaluation Kit; is it an Engineering Sample (ES) or Production silicon? | N/A | N/A |
61849 | 6 Series and 7 Series Xilinx Evaluation Kits - Known Issues and Release Notes Master Answer Record for the Texas Instruments Power Solution | N/A | N/A |
AR# 45382 | |
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日期 | 08/29/2016 |
状态 | Active |
Type | 已知问题 |
Boards & Kits |