2. 技术支持
  3. AR# 5865: Virtex-II/-II Pro/-4/-5/-6 Configuration - The DONE pin goes High, but the device does not start up (I/Os are inactive/3-stated)
  4. AR# 58658: Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.3), Table 1-27 has incorrect FMC1 HPC connections

AR# 58658

|

Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.3), Table 1-27 has incorrect FMC1 HPC connections

描述

Table 1-27, of the VC707 Evaluation Board User Guide v1.3 (UG885), outlines the J35 VITA 57.1 FMC HPC connections.

U1 FPGA Pin N39 is listed twice. Is this correct?

解决方案

There is a typo in Table 1-27 of UG885 (v1.3); N39 should only be listed once.

The corrected section of the table is as follows:

FMC1_HPC_LA10_N is connected to U1 FPGA Pin M39.

FMC1_HPC_LA14_P is connected to U1 FPGA Pin N39.

Table 1-27 has been updated in UG885 (v1.4) to correctly reflect this pinout.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
45382 Virtex-7 FPGA VC707 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
AR# 58658
日期 05/27/2014
状态 Active
Type 综合文章
Boards & Kits
People Also Viewed