AR# 67572

描述

(UG885) VC707 Evaluation Board for the Virtex-7 FPGA User Guide (v1.7), includes the BPI flash memory connections to the FPGA in Table 1.5.

FLASH_A21 and FLASH_A22 nets are both assigned to the FPGA (U1) Pin, is this correct?

解决方案

There is a typo in Table 1-5 of UG885 (v1.7).

FLASH_A21 should be assigned to pin BA40 of U1 FPGA, while FLASH_A22 should be assigned to pin BA39 of U1 FPGA.

This has been corrected in UG885 (v1.7.1).