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Adaptable Advantage 博客

Adaptable Advantage 博客

2021 Blog

MicroZed Chronicles: Working with Kria SOMs and Vitis AI 1.4
MicroZed Chronicles: Example Designs in Vivado and Vitis
First shipments of Virtex UltraScale+ VU57P production FPGA reach customers
MicroZed Chronicles: A Look at the UltraZed EV/EG Board
面向 Versal ACAP 的 SmartLynq+ 模块：秒级迭代，最大化生产力
MicroZed Chronicles: Proportional Integral Derivative Controller using HLS
MicroZed Chronicles: MicroBlaze Internal / External Memory and Cache
MicroZed Chronicles: The 400th Edition
Versal 评估套件 | 面向 ACAP 用户的 Xilinx Versal 评估套件上市
White Paper: New UltraScale+ Devices in InFO Packaging Enable Compact Industrial Cameras
White Paper: Importance of Programmability in Next-Generation Security Appliances
White Paper: Achieving Embedded Design Simplicity with Kria SOMs
Introducing the Enhanced Versal Prime Series, Now Featuring PCIe Gen 5

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2020 Blog

Versal ACAP’s CPM: Satisfying the Most Demanding Connectivity Requirements with PCI Express
Xilinx Zynq UltraScale+ RFSoC ZCU216 Evaluation Kit Brings RF to Everyone
White Paper: Xilinx Delivers the Best Platform When It Comes to PTP Accuracy
To Versal Or Not To Versal? That Is The Question…
Spartan-7 Goes Industrial
Xilinx Teams up with Movandi to Demonstrate Open-RAN Radio Unit Demonstration Platform
Introducing the Kintex UltraScale+ KU19P FPGA: Optimized for Network Acceleration
Versal Premium Series | Breakthrough Integration of Networked, Power-Optimized Cores on an Adaptable Platform
Xilinx Helps Enhance Image Quality, Speed, and Accuracy in Medical Ultrasound Systems
Radiation Tolerant Kintex UltraScale FPGA: One Small Step for Xilinx, Three Giant Leaps for Nodes
Watch Video: ML Inference at the Edge with Versal ACAP
White Paper: Convolutional Neural Network with INT4 Optimization on Xilinx Devices
Zynq UltraScale+ RFSoC ZCU208 Evaluation Kit Available Now
Major Advantages with Vivado Design Suite 2020.1

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2019 Blog

Increase your products’ cryptographic performance by using cryptographic hardware acceleration
Only evaluation kit with the full gamut of 56G interfaces, available now
Flexible xHaul Gateway Supports Converged Access Network for Cost-Optimized 5G Infrastructure
Webinar: How to use an Arm Cortex-M processor with Xilinx-based FPGAs and SoCs
Facing Memory Bandwidth Challenge? Virtex UltraScale+ HBM VCU128 FPGA Evaluation Kit Is Here To Solve Your Problems
Massive MIMO System Design with Whizz System’s Band 42 RFMC Add-on Card
To reach for the clouds, to stay at the edge or both? You choose, we adapt!
Xilinx PAM4 Technology at DesignCon - Part 2
Deploying Leading Edge 58G PAM4 Technology While Preserving Legacy Infrastructure
Past, Present, Future - Xilinx on Mars Rovers…!
Xilinx Extends its Zynq UltraScale+ RFSoC Portfolio to Address Full sub-6GHz Spectrum for 5G New Radio
Xilinx PAM4 Technology at DesignCon - Part 1
Sharing Our Know-How to Make Your Products Safer
Supercharge your memory-bound compute acceleration with Xilinx Virtex UltraScale+ HBM FPGAs
Zynq UltraScale+ RFSoC for Remote PHY Node - What It Is and Why You Need It.
Looking for Heterogeneous Acceleration with Software Programmability — Versal Delivers
Improve Your Data Center Performance With The New QDMA Shell
Xilinx FlexE and 400G Ethernet solutions for next generation networks to enable higher performance and bandwidth
National Cybersecurity Awareness Month: Register for upcoming Xilinx Security Working Group free of charge
HBM2: Data Fuel for the Alveo Engine
OpenAMP Framework for Multi-Processor Devices becomes a Linaro Community Project
Reduce Your Risk in Industrial and Healthcare IoT by Attending Xilinx Security Working Group 2019
Protect Your Assets in Healthcare and Industrial Domain: Watch Video
Take Your Security to the Next Level with a Trusted Execution Environment
Designing 5G NR? Get started your RF system designs with the Zynq UltraScale+ RFSoC Development Kit with Qorvo RF Front End

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2018 Blog

Xilinx 2018 五大产品新闻回顾
Distributing Intelligence from the World’s Most Popular Cloud for Real-Life and Real-Time Industrial Edge Applications
International Field Programmable Logic & Applications (FPL) Conference 2018 Recap Part 2
International Field Programable Logic & Applications (FPL) Conference 2018 Recap
AWS at XDF: Accelerate FPGA Development, Test, and Application Deployment Natively on AWS EC2 F1
The Coffee Conundrum: The Origins of Ultra96
Xilinx Unveiled the Secret Sauce of the Ultimate AI Inference Compute at XDF ‒ Versal AI Engine Array
Xilinx Introduces the Industry’s First Configurable Integrated SD-FEC— Leading to Higher Throughput with Lower Power
Data is Always Better Visualized
2018 Flash Memory Summit Recap: The Data-Centric Era has Arrived
Don't know where to start your own projects with FPGAs or SoCs? Start with easy-to-use development platforms by Xilinx!
Zynq UltraScale+ RFSoC News You Don't Want To Miss—And Other Key Updates
Accelerating Hadoop MapReduce Framework on F1 and Achieving 10X Speed-Up with Xilinx SDAccel Tool
4 Optimization Techniques To Maximize The Benefits of SDAccel For Cloud Computing
Xilinx at Flash Memory Summit 2018
Harnessing Python Power: The Simplest Way to Make Your Product Smart and Connected
RF-Class Analog Design Must-Haves Now Available
Breaking Down the Complexity of Functional Safety Design
First of Its Kind: Multi-Gigabit ADC/DAC Sampling Kit with FPGA Logic

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