This answer record contains the Release Notes and Known Issues for the SPDIF/AES3 core and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and newer tool versions.
For past known issue logs and ISE support information, see the IP Release Notes Guide (XTP025):
https://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf
LogiCORE IP SPDIF/AES3 Core Page:
https://www.xilinx.com/content/xilinx/en/products/intellectual-property/ef-di-spdif.html
General Information
Supported devices can be found in the following three locations:
For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.
Table 1 correlates the core version to the first Vivado design tools release version in which it was included.
Table 1: Version
| Core Version | Vivado Tools Version | IP Changelog |
|---|---|---|
| v2.0 (Rev. 19) | 2018.1 | (Xilinx Answer 70699) |
| v2.0 (Rev. 18) | 2017.4 | (Xilinx Answer 70386) |
| v2.0 (Rev. 17) | 2017.3 | (Xilinx Answer 69903) |
| v2.0 (Rev. 16) | 2017.2 | (Xilinx Answer 69326) |
| v2.0 (Rev. 15) | 2017.1 | (Xilinx Answer 69055) |
| v2.0 (Rev. 14) | 2016.4 | (Xilinx Answer 68369) |
| v2.0 (Rev. 13) | 2016.3 | (Xilinx Answer 68021) |
| v2.0 (Rev. 12) | 2016.2 | (Xilinx Answer 67345) |
| v2.0 (Rev. 11) | 2016.1 | (Xilinx Answer 66930) |
| v2.0 (Rev. 10) | 2015.4 | (Xilinx Answer 66004) |
| v2.0 (Rev. 9) | 2015.3 | (Xilinx Answer 65570) |
| v2.0 (Rev. 8) | 2015.1 | |
| v2.0 (Rev. 7) | 2014.4 | (Xilinx Answer 62882) |
| v2.0 (Rev. 6) | 2014.3 | (Xilinx Answer 62144) |
| v2.0 (Rev. 5) | 2014.2 | |
| v2.0 (Rev. 4) | 2014.1 | (Xilinx Answer 59986) |
| v2.0 (Rev. 3) | 2013.4 | |
| v2.0 (Rev. 2) | 2013.3 | |
| v2.0 (Rev. 1) | 2013.2 | |
| v2.0 | 2013.1 |
Table 2 provides answer records for general guidance when using the LogiCORE IP SPDIF/AES3 core.
Table 2: General Guidance
| Answer Record | Title |
|---|---|
| N/A | N/A |
Known and Resolved Issues
The following table provides known issues for the LogiCORE IP SPDIF/AES3 core, starting with v2.0, initially released in Vivado Design Suite 2013.1.
Note: The "Version Found" column lists the version the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
| Answer Record | Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 59555) | Where can I find the XDC constraints for this IP? | v2.0 (Rev. 2) | N/A |
Revision History
| 04/04/2018 | Added v2.0 (Rev. 4), v2.0 (Rev. 5), v2.0 (Rev. 6), v2.0 (Rev. 7), v2.0 (Rev. 8), v2.0 (Rev. 9), v2.0 (Rev. 10), v2.0 (Rev. 11), v2.0 (Rev. 12), v2.0 (Rev. 13), v2.0 (Rev. 14), v2.0 (Rev. 15), v2.0 (Rev. 16), v2.0 (Rev. 17), v2.0 (Rev. 18), and v2.0 (Rev. 19) to Version Table |
| 02/26/2014 | Added v2.0 (Rev. 3) to Version Table and (Xilinx Answer 59555) |
| 10/23/2013 | Added v2.0 (Rev. 1) and v2.0 (Rev. 2) to Version Table |
| 04/03/2013 | Initial release |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 56852 | Xilinx Multimedia, Video and Imaging Solution Center - Top Issues | N/A | N/A |
| 69005 | 2017.2 Vivado - Video IP - Where can I find the Video IP that was removed from the 2017.2 release (Modular Media over IP cores)? | N/A | N/A |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 59555 | LogiCORE IP S/PDIF - Where can I find the XDC constraints for this IP? | N/A | N/A |
| AR# 54543 | |
|---|---|
| 日期 | 04/09/2018 |
| 状态 | Active |
| Type | 版本说明 |
| Tools | |
| IP | |