This answer record contains the Release Notes and Known Issues for the LogiCORE IP Video Scaler core and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and newer tool versions.
For past known issue logs and ISE support information, see the IP Release Notes Guide (XTP025):
https://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf
LogiCORE IP Video Scaler core IP Page:
https://www.xilinx.com/content/xilinx/en/products/intellectual-property/ef-di-vid-scaler.html
The Video Scaler core has been discontinued. Please see the Following PDN:
https://www.xilinx.com/support/documentation/customer_notices/XCN16020.pdf
Note: This core is discontinued and will be removed from the Vivado IP catalog in Vivado 2016.3.
Users are recommended to use the Video Processing Subsystem's Scaler configuration, (Xilinx Answer 65449).
General Information
Supported devices can be found in the following three locations:
For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado design tools.
Table 1 correlates the core version to the first Vivado design tools release version in which it was included.
Table 1: Version
| Core Version | Vivado Tools Version |
|---|---|
| v8.1 (Rev. 9) | 2016.2 |
| v8.1 (Rev. 8) | 2016.1 |
| v8.1 (Rev. 7) | 2015.4 |
| v8.1 (Rev. 6) | 2015.3 |
| v8.1 (Rev. 5) | 2015.1 |
| v8.1 (Rev. 4) | 2014.4 |
| v8.1 (Rev. 3) | 2014.1 |
| v8.1 (Rev. 2) | 2013.4 |
| v8.1 (Rev. 1) | 2013.3 |
| v8.1 | 2013.2 |
| v8.0 | 2013.1 |
Table 2 provides answer records for general guidance when using the LogiCORE IP Video Scaler core.
Table 2: General Guidance
| Answer Record | Title |
|---|---|
| (Xilinx Answer 60484) | How do I scale interlaced content? |
| (Xilinx Answer 35262) | How do I create scaling coefficients and COE files for the LogiCORE IP Video Scaler? |
Known and Resolved Issues
Table 3 provides known issues for the LogiCORE IP Video Scaler core, starting with v8.0 (initially released in Vivado Design Suite 2013.1).
Note: The "Version Found" column lists the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
Table 3: IP
| Answer Record | Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 61433) | Why does the Video Scaler C-Model results differ when running the precompiled run_bitacc_cmodel.exe file for NT64? | v7.00.a | N/A |
| (Xilinx Answer 61066) | Why is the m_axis_tvalid output always low? | v7.01.a | N/A |
| (Xilinx Answer 58730) | Why do I see noise in output from the Video Scaler when loading a COE file with negative coefficients? | v8.0 | N/A |
| (Xilinx Answer 57890) | Why do I get an error saying that the data type of 4:4:4 is not supported, when using auto parameter propagation? | v8.0 | v8.1 (Rev. 2) |
| (Xilinx Answer 57048) | Why do I see what appears to be random glitches or flickering for several frames each second, in video output from the Video Scaler? | v7.01.a | v8.1 (Rev. 1) |
| (Xilinx Answer 56706) | Why do I get a simulation error: Index X out of bound X down to X, when trying to simulate the Video Scaler? | v8.0 | N/A |
| (Xilinx Answer 56274) | Vivado 2013.2 Multimedia Video and Imaging - How do I properly constrain the Video IP in my design? | v8.0 | v8.1 (Rev. 1) |
| (Xilinx Answer 52215) | Why does my core fail timing with an Critical Warning? | v7.01.a | v8.1 (Rev. 1) |
| (Xilinx Answer 52289) | Why does writing to the Status Register fail to clear the Error bits? | v7.01.a | N/A |
| (Xilinx Answer 52285) | Why do the INTC_IF interface register and pins not behave according to the documentation? | v7.01.a | N/A |
| (Xilinx Answer 52392) | Why are the Horizontal Shrink Factor (HSF) and the Vertical Shrink Factor (VSF) registers zero when the AXI4-Lite interface is selected? | v7.01.a | v8.0 |
| (Xilinx Answer 55897) | Why does the output of the Scaler wrap when the aperture includes the last pixel of the input frame? | v7.01.a | v8.1 |
| (Xilinx Answer 56043) | Software reset does not work | v7.01.a | v8.1 |
| (Xilinx Answer 56367) | Why does the Video Scaler test bench some times fail with a timeout error after the first frame? | v8.1 | v8.1 |
| (Xilinx Answer 55980) | Why do I see write failures on the AXI4-Lite bus, when the AXI4-Stream clock is at a different frequency than the AXI4-Lite interface clock? | v8.0 | v8.1 |
| (Xilinx Answer 56484) | Why does the writing of the coefficients sometimes fail after installing the patch for AR55980? | v7.01.a | v8.1 |
| (Xilinx Answer 52664) | Why does an EOL error not occur on the INTC_IF or in the interrupt registers, even when my frame size is valid? | v7.00.a | N/A |
| Answer Record | Title | Version Found | Version Resolved |
|---|---|---|---|
| (Xilinx Answer 58870) | Why do I see differences between the Coefficients in the C-Model and the Software Driver in the Vivado 2013.4 tool? | v4.03.a | v5.00.a |
| (Xilinx Answer 55984) | Video Scaler Software Driver v4.03.a Patch Download | patch | v4.03.a (patch) |
| (Xilinx Answer 55987) | Why does SDK fail to compile the Video Scaler Software Driver v4.02.a when using IDS 14.5 or Vivado 2013.1? | v4.02.a | v4.03.a |
| (Xilinx Answer 56164) | Why does the Video Scaler stop accepting input video if the input, output and aperture are 2048 or larger and using the Video Scaler software driver? | v4.02.a | v4.03.a |
Revision History
| 06/29/2017 | Note: This core is discontinued and will be removed from the Vivado IP catalog in Vivado 2016.3. Users are recommended to use the Video Processing Subsystem's Scaler configuration, (Xilinx Answer 65449) |
| 09/15/2016 | Added v8.1 (Rev. 9) and Product Discontinuation Notice. |
| 04/06/2015 | Added v8.1 (Rev. 4), v8.1 (Rev. 5), v8.1 (Rev. 6), v8.1 (Rev. 7) and v8.1 (Rev. 8) to Version Table. |
| 09/15/2014 | Added (Xilinx Answer 60484) |
| 07/09/2014 | Added (Xilinx Answer 61433) |
| 06/09/2014 | Added (Xilinx Answer 61066) |
| 04/16/2014 | Added v8.1 (Rev. 3) to Version Table. |
| 12/18/2013 | Added v8.1 (Rev. 2) to Version Table, (Xilinx Answer 58730), (Xilinx Answer 58870) and updated Known and Resolved Issues table for 2013.4. |
| 11/20/2013 | Added (Xilinx Answer 56706) |
| 10/23/2013 | Added v8.1 (Rev. 1) to Version Table, (Xilinx Answer 57048), (Xilinx Answer 57890) and updated Known and Resolved Issues table for 2013.3. |
| 06/19/2013 | Added v8.1 to Version Table, (Xilinx Answer 56367), (Xilinx Answer 56274), (Xilinx Answer 55980), (Xilinx Answer 56484) |
| 05/28/2013 | Added (Xilinx Answer 56164) |
| 05/16/2013 | Added (Xilinx Answer 56043) |
| 05/13/2013 | Added (Xilinx Answer 55984), (Xilinx Answer 55987) |
| 05/07/2013 | Added (Xilinx Answer 55897) |
| 04/03/2013 | Initial release |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 56852 | Xilinx Multimedia, Video and Imaging Solution Center - Top Issues | N/A | N/A |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 31958 | LogiCORE IP Video Scaler - Release Notes and Known Issues | N/A | N/A |
| 54005 | LogiCORE IEEE 802.3 Multi-Channel 25G RSFEC Core - Simulation issue with Questa Sim | N/A | N/A |
| 61625 | Video IP Example Design Landing Page | N/A | N/A |
| AR# 54540 | |
|---|---|
| 日期 | 07/10/2017 |
| 状态 | Archive |
| Type | 版本说明 |
| Tools | |
| IP | |