Create Kernel Description XML File

A kernel description XML file needs to be manually created for the RTL IP to be used as an RTL kernel in SDAccel environment. The following is an example of the kernel XML file:

<?xml version="1.0" encoding="UTF-8"?>
<root versionMajor="1" versionMinor="0">
<kernel name="input_stage" language="ip"
vlnv="xilinx.com:hls:input_stage:1.0" attributes=""
preferredWorkGroupSizeMultiple="0" workGroupSize="1">
<ports>
<port name="M_AXI_GMEM" mode="master" range="0x3FFFFFFF" dataWidth="32"
portType="addressable" base="0x0"/>
<port name="S_AXI_CONTROL" mode="slave" range="0x1000" dataWidth="32"
portType="addressable" base="0x0"/>
<port name="AXIS_P0" mode="write_only" dataWidth="32" portType="stream"/>
</ports>
<args>
<arg name="input" addressQualifier="1" id="0" port="M_AXI_GMEM"
size="0x4" offset="0x10" hostOffset="0x0" hostSize="0x4" type="int*" />
<arg name="__xcl_gv_p0" addressQualifier="4" id="" port="AXIS_P0"
size="0x4" offset="0x18" hostOffset="0x0" hostSize="0x4" type=""
memSize="0x800"/>
</args>
</kernel>
<pipe name="xcl_pipe_p0" width="0x4" depth="0x200" linkage="internal"/>
<connection srcInst="input_stage" srcPort="p0" dstInst="xcl_pipe_p0"
dstPort="S_AXIS"/>
</root>

The following table describes the format of the kernel XML in detail:

Table 1. Kernel XML Format
Tag Attribute Description
<root> versionMajor Set to 1 for the current release of SDAccel
versionMinor Set to 0 for the current release of SDAccel
<kernel> name Kernel name
language Always set it to "ip" for RTL kernels
vlnv

Must match the vendor, library, name, and version attributes in the component.xml of an IP. For example, If component.xml has the following tags:

<spirit:vendor>xilinx.com</spirit:vendor>

<spirit:library>hls</spirit:library>

<spirit:name>test_sincos</spirit:name>

<spirit:version>1.0</spirit:version>

the vlnv attribute in kernel XML will need to be set to:

xilinx.com:hls:test_sincos:1.0
attributes Reserved. Set it to empty string.
prefreredWorkGroupSizeMultiple Reserved. Set it to 0.
workGroupSize Reserved. Set it to 1.
<port> name Port name. At least an AXI4 master port and an AXI4-Lite slave port are required. AXI stream port can be optionally specified to stream data between kernels. The AXI4-Lite interface name must be S_AXI_CONTROL.
mode
  • For AXI-4master port, set it to "master".
  • For AXI-4 slave port, set it to "slave".
  • For AXI Stream master port, set it to "write_only".
  • For AXI Stream slave port, set it "read_only".
range The range of the address space for the port.
dataWidth The width of the data that goes through the port, default is 32 bits.
portType Indicate whether or not the port is addressable or streaming.
  • For AXI4 master and slave ports, set it to "addressable".
  • For AXI4-Stream ports, set it to "stream".
base For AXI4 master and slave ports, set to "0x0". This tag is not applicable to AXI4-Stream ports.
<arg> name Kernel argument name.
addressQualifier Valid values:
  • 0: Scalar kernel input argument
  • 1: global memory
  • 2: local memory
  • 3: constant memory
  • 4: pipe
id

Only applicable for AXI4 master and slave ports. The ID needs to be sequential. It is used to determine the order of kernel arguments.

Not applicable for AXI4-Stream ports.
port Indicates the port that the arg is connected to.
size Size of the argument. The default is 4 bytes.
offset Indicates the register memory address.
type The C data type for the argument. E.g. int*, float*
hostOffset Reserved. Set to 0x0.
hostSize Size of the argument. The default is 4 bytes.
memSize

Not applicable to AXI-4 master and slave ports.

For AXI4-Stream ports, memSize sets the depth of the FIFO created for the AXI stream ports.
The following tags specify additional information for AXI4-Stream ports. They are not applicable to AXI4 master or slave ports.
<pipe> For each pipe in the compute unit, the compiler inserts a FIFO for buffering the data. The pipe tag describes configuration of the FIFO.
name This specifies the name for the FIFO inserted for the AXI4-Stream port. This name must be unique among all pipes used in the same compute unit.
width This specifies the width of FIFO in bytes. For example, 0x4 for 32-bit FIFO.
depth This specifies the depth of the FIFO in number of words.
linkage Always set to "internal".
<connection> The connection tag describes the actual connection in hardware either from the kernel to the FIFO inserted for the PIPE or from the FIFO to the kernel.
srcInst Specifies the source instance of the connection.
srcPort Specifies the port on the source instance for the connection.
dstInst Specifies the destination instance of the connection.
dstPort Specifies the port on the destination instance of the connection.