Compilation Flow

The Xilinx® SDAccel™ Environment is used for creating and compiling applications using the OpenCL® framework onto a Xilinx FPGA. This tool suite provides a software development environment for algorithm development and emulation on x86 based workstations, as well as deployment mechanisms for Xilinx FPGAs.

The compilation of OpenCL applications into binaries for execution on an FPGA does not assume nor require FPGA design knowledge. A basic understanding of the capabilities of an FPGA is necessary during application optimization in order to maximize performance. The SDAccel environment handles the low-level details of program compilation and optimization during the generation of application specific compute units for an FPGA fabric. Therefore, using the SDAccel Environment to compile an OpenCL program does not place any additional requirements on the user beyond what is expected for compilation on a CPU or GPU target.

TIP: The SDAccel Xilinx Open Code Compiler (XOCC), xocc, is a command line compiler that takes your source code and runs it through the Xilinx implementation tools to generate the bitstream and other files that are needed to program the FPGA-based accelerator boards. It supports kernels expressed in OpenCL C, C++ and RTL (SystemVerilog, Verilog, or VHDL).

An OpenCL program can be compiled using standalone command line compilers (xcpp for host code and xocc for kernels) in the SDAccel development environments. This chapter details the compilation flow.