SDAccel Development Environment Help
SDx Environments Release Notes, Installation, and Licensing Guide
Release Notes and Supported Hardware
Introduction to the SDx Environments
Obtaining a License on the Xilinx Licensing Site
Installing the SDx Environments
SDAccel Environment User Guide
Introduction
Creating an SDAccel Project
Profiling and Optimizing the Kernel
Debugging Applications in the SDAccel Environment
Compilation Flow
Getting Started with Examples
Managing Platforms and Repositories
Understanding the OpenCL Platform and Memory Model
OpenCL Built-In Functions Support in the SDAccel Environment
Creating RTL Kernels
xbinst Command Reference
Xilinx Board Swiss Army Knife Utility
Using the Runtime Initialization File
Converting Tcl Compilation Flow to XOCC
Board Installations
SDAccel Environment Programmers Guide
SDAccel Environment Programmers Guide
SDAccel Environment Debugging Guide
SDAccel Environment Debugging Guide
SDAccel Environment Tutorial: Introduction
Introduction
Flow Overview
SDAccel Environment Profiling and Optimization Guide
Introduction
What is an FPGA?
What is OpenCL?
Application Optimization Flow
Estimating Performance
Profiling the Application in the SDAccel Environment
SDAccel Optimization Recommendations
Optimizing Host Code
Moving Data Efficiently between Kernel and Global Memory
Optimizing Kernels
On-Boarding Examples
SDx Pragma Reference Guide
Introduction
OpenCL Attributes
SDS Pragmas
HLS Pragmas
Vivado HLS Optimization Methodology Guide
Introduction
Optimizing the Hardware Function
Optimize Structures for Performance
Data Access Patterns
Standard Horizontal Convolution
OpenCL Attributes
HLS Pragmas
Additional Resources
References
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