Using Hardware Emulation

The SDAccel™ Environment generates at least one custom compute unit for each kernel in an application. This means that while the Software Emulation flow is a good measure of functional correctness, it does not guarantee correctness on the FPGA execution target. Before deployment, check that the custom compute units generated by the tool are producing the correct results.

The SDAccel Environment has a Hardware Emulation flow, which enables the programmer to check the correctness of the logic generated for the custom compute units. This emulation flow invokes the hardware simulator in the SDAccel environment to test the functionality of the logic that will be executed on the FPGA compute fabric.

The memory model used for Hardware Emulation is not cycle accurate with RTL; consequently, any performance numbers shown in the profile summary report are approximate, and must be used only as a general guidance and for comparing relative performance between different kernel implementations.