Elements of SDAccel

The SDAccel™ Environment inherits many of the tools in the Xilinx® Software Development Kit (SDK), including GNU toolchains and standard libraries (for example, glibc) as well as the Target Communication Framework (TCF) and GDB interactive debuggers, a performance analysis perspective within the Eclipse/CDT-based GUI, and command-line tools.

The SDAccel Environment includes a system compiler (xocc) that generates complete hardware/software systems, an Eclipse-based user interface to create and manage projects and workflows, and a system performance estimation capability to explore different "what if" scenarios for the hardware/software interface.

The SDAccel system compiler employs underlying tools from the Vivado Design Suite (System Edition), including Vivado® HLS, IP integrator, IP libraries for data movement and interconnect, and the RTL synthesis, placement, routing, and bitstream generation tools.

TIP: After you have done a build in SDx, you can launch Vivado. From the SDx menu, select Xilinx > Vivado Integration > Open Vivado Project.

The principle of design reuse underlies workflows you employ with the SDAccel environment, using well established platform-based design methodologies. SDAccel solutions are compiled against a target platform, a combination of board and infrastructure components on which the kernels of an application are executed. The SDAccel Environment includes a number of platforms for application development, and others can be provided by Xilinx partners, or custom developed by FPGA design teams. The SDAccel Environment Platform Development Guide describes how to create a design using the Vivado Design Suite, specify platform properties to define and configure Platform Interfaces, and define the corresponding software run-time environment to build a platform for use in the SDAccel environment.

Devices can be provided by SDAccel ecosystem partners, FPGA design teams, and Xilinx.