2. 技术支持
  3. AR# 7363:
  4. AR# 73633: LogiCORE IP MIPI D-PHY v4.1 (rev.5) - Why am I failing timing on some -1 parts when trying to set the line rate to 2500Mbps using Vivado 2019.2?

AR# 73633

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LogiCORE IP MIPI D-PHY v4.1 (rev.5) - Why am I failing timing on some -1 parts when trying to set the line rate to 2500Mbps using Vivado 2019.2?

描述

When trying to target specific parts, there is a timing failure in the bitslice internal to the MIPI D-PHY IP when setting the line rate to 2500Mbps.

When the line rate is reduced to 2400Mbps this failure is no longer present.

解决方案

This issue is due to incorrect reporting on the Vivado tool and can safely be ignored.

For users who cannot ignore this timing failure, please upgrade to a newer tool version or reduce the line rate to 2400Mbps.

This is a known issue and has been resolved in 2019.2.2 and later versions of the tools.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
54550 LogiCORE IP MIPI D-PHY - Release Notes and Known Issues for the Vivado 2015.3 tool and later versions N/A N/A
65242 MIPI CSI-2 Receiver Subsystem - Release Notes and Known Issues for the Vivado 2015.3 tool and later versions N/A N/A
AR# 73633
日期 05/01/2020
状态 活跃
Type 一般类
IP
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