This Answer Record covers a known issues article for the AXI SmartConnect IP, which affects designs in Vivado 2018.3.
The 2018.3 version of SmartConnect includes support to resolve the issue described in (Xilinx Answer 70838).
However this support did not cover all of the necessary cases.
In some situations, narrow single accesses are still improperly upsized.
A narrow access is one where AxSIZE is narrower than the data width of the AXI interface.
A single access is one were AxLEN = 0.
The SmartConnect does not observe these signals properly and upsizes the transaction so that AxSIZE matches the data width of the MI AXI interface.
This can cause side effects at end point AXI-Lite slaves where the upsized transaction reads or writes to invalid addresses.
This problem is most likely to occur in designs where SmartConnects are cascaded.
The attached patch allows for the propagation of narrow singles through SmartConnect.
The incoming AxSIZE on the SmartConnect SI interface propagates to the SmartConnect MI interface, regardless of MI interface data width.
The patch only applies to the 2018.3 release. The issue will be fixed in Vivado 2019.1.
文件名 | 文件大小 | File Type |
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smartconnect_v1_0_cr1018713.tar.gz | 1 MB | GZ |
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
66780 | AXI SmartConnect - Release Notes and Known Issues | N/A | N/A |
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
70838 | 支持 PCI Express IP 的 AXI Smartconnect 的设计咨询 — 互操作性问题:数据请求的增多会导致潜在的数据损坏问题 | N/A | N/A |