AR# 71708

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LogiCORE IP MIPI CSI-2 Receiver Subsystem v3.0 (rev.3) - Unable to synthesize MIPI example design on Windows OS

描述

The MIPI example design fails in synthesis with the following error message:

module 'design_1_v_gamma_lut_0_0_v_gamma_lut' is not found." 

What can cause the problem?

解决方案

This is a known issue for MIPI CSI-2 Receiver Subsystem v3.0 (rev.3) example design in Vivado 2018.2.

It is fixed in Vivado 2018.3 or later versions.

All users are recommended to upgrade to the latest Vivado version, or use Linux OS as a work-around.


链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
65242 MIPI CSI-2 Receiver Subsystem - Release Notes and Known Issues for the Vivado 2015.3 tool and later versions N/A N/A
AR# 71708
日期 01/14/2019
状态 Active
Type 综合文章
器件 More Less
Tools
IP
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