This is the Master Answer Record for XAPP589 "All Digital VCXO Replacement for Gigabit Transceiver Applications (7 Series - Zynq 7000)" and XAPP1241 "All Digital VCXO Replacement for Gigabit Transceiver Applications (UltraScale FPGAs)"
http://www.xilinx.com/support/documentation/application_notes/xapp589-VCXO.pdf
http://www.xilinx.com/support/documentation/application_notes/xapp1241-vcxo.pdf
It lists known issues, bugs and workarounds.
| (Xilinx Answer 64002) |
XAPP589 XAPP1241 v2.4 - Long runtime during route_design |
| (Xilinx Answer 65780) | XAPP589 XAPP1241 v2.4 - ERROR: [Vivado 2-1106] update_macro: no cell found for cell name |
| (Xilinx Answer 65781) | XAPP589 XAPP1241 v2.4 - VIVADO 2015.3 - Failure to create an example project using reference files. |
| (Xilinx Answer 66089) | XAPP589 XAPP1241 v2.4 - Virtex-7 example design generates ERROR: [DRC 23-20] Rule violation (RPBF-1)...... |
| (Xilinx Answer 67002) | XAPP589 v2.4-ERROR: [PICXO-202] /U0/Inst_picxo_top set to GTX but no GT detected |
| (Xilinx Answer 63586) | XAPP589 XAPP1241 v2.3 or later - How can I access the HW Version register? |
| (Xilinx Answer 56770) | XAPP589 v2.2 - DRPDATA_USER_O is not provided with the code, why is this? |
| (Xilinx Answer 56771) | XAPP589 XAPP1241 - Is it possible to simulate the PICXO? |
| (Xilinx Answer 57310) | XAPP589 XAPP1241 - Place warnings [Place 30-568] |
| (Xilinx Answer 56821) | XAPP589 - What version of tools and XAPP support GTH in 7-Series? |
| (Xilinx Answer 57675) | XAPP589 XAPP1241 - Is there an example design for Xilinx demo boards? |
| (Xilinx Answer 59089) | XAPP589 v2.1 - When using the VCXO secondary clocking scheme, pre_opt_design.tcl errors out |
| (Xilinx Answer 59116) | XAPP589 XAPP1241 - What is the maximum limit of G2/G1? |
| (Xilinx Answer 62330) | XAPP589 VCXO v2.2 - G1 / G2 Range is incorrect |
| (Xilinx Answer 62948) | XAPP589 v2.2 - Artix-7 CRITICAL WARNING: [Designutils 20-964] and Warning [Vivado 12-3731 when targeting 15T, 35T & 50T devices |
| (Xilinx Answer 62949) | XAPP589 v2.2 - When targeting an Artix-7 Device the following error can be seen [Designutils 20-941] |
| (Xilinx Answer 63649) | XAPP589 v2.2 - pre_opt.tcl finds an extra PICXO and generates "WARNING: [Vivado 12-508]" and "ERROR: [PICXO-202] is not supported" and ERROR: [Common 17-55] |
| (Xilinx Answer 53537) | 14.x PlanAhead (XAPP589) "CRITICAL WARNING: [Shape Builder 18-146] Failed to build an RLOC shape for set vcxo_rloc..." |