This is a known issue for the core implemented in Artix and Kintex devices due to an Intel errata. To work around this issue, please refer to (Xilinx Answer 51135).
An out-of-the-box solution is available to enable customers to run the Kintex-7 Connectivity TRD. This involves using a particular set of files (bit and MCS file) when running the Connectivity TRD. The files needed, k7_conn_trd.bit and kc705_conn_trd.mcs, can be found below.
For information on how to run the Connectivity TRD, please refer to the Kintex-7 FPGA Connectivity Targeted Reference Design User Guide (UG927):
http://www.xilinx.com/support/documentation/boards_and_kits/ug927-K7-Connectivity-TRD.pdf
This solution is no longer required for Connectivity TRD (v1.4); the PCIe IP has been updated, so this patch no longer applies.
| 文件名 | 文件大小 | File Type |
|---|---|---|
| k7_conn_trd.bit | 8 MB | BIT |
| kc705_conn_trd.mcs | 23 MB | MCS |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 50555 | Kintex-7 FPGA Connectivity Kit and Targeted Reference Design - Release Notes and Known Issues Master Answer Record | N/A | N/A |
| AR# 52655 | |
|---|---|
| 日期 | 06/05/2013 |
| 状态 | Active |
| Type | 综合文章 |
| Boards & Kits | |