2. 技术支持
  3. AR# 5225: F1.5/F1.5i Schematic Editor, Virtex: Do not use BUFGIO library component
  4. AR# 52252: Zynq-7000 SoC ZC702 Evaluation Kit TRD - Why is my 1080p60 input not being detected when using the Avnet IMAGEON FMC daughter card with the 14.1 or 14.2 TRD design?

AR# 52252

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Zynq-7000 SoC ZC702 Evaluation Kit TRD - Why is my 1080p60 input not being detected when using the Avnet IMAGEON FMC daughter card with the 14.1 or 14.2 TRD design?

描述

Why is my 1080p60 input not being detected when using the Avnet IMAGEON FMC daughter card with the 14.1 or 14.2 Targeted Reference Design (TRD)?

This applies to the Zynq-7000 SoC ZC702 Evaluation Kit TRD and Video and Imaging Kit (ZVIK) TRD designs.

解决方案

This is a known issue with the 14.1 and 14.2 TRD, that makes it fail with many input devices when used with the Avnet IMAGEON FMC daughter card. This is due to the fact that the EDID PROM is not being configured properly at startup.

This issue has been resolved in a updated version of the 14.2 ZC702 Zynq Base Targeted Reference Design, which was made available on or after October 5, 2012.

This issue is not a problem in the 14.3 or later TRD.

The updated 14.2 ZC702 Zynq Base Targeted Reference Design ZIP file contains a folder called zynq_base_trd_14_2_up1 and a note in the Readme.txt "FSBL modifications to fix issue when connecting external video source through" and is available at:

https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html#documentation

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
47864 Zynq-7000 SoC ZC702 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
52540 Zynq-7000 SoC - Frequently Asked Questions N/A N/A
AR# 52252
日期 05/21/2018
状态 Active
Type 综合文章
器件
Boards & Kits
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