Correct Settings (v5.4) | Failing Settings (v5.5) | |
TXPLL_CP_CFG | 39 | 0D |
TXPLL_DIVSEL_OUT | 1 | 2 |
TXPLL_DIVSEL_FB | 2 | 4 |
RXPLL_DIVSEL_REF | 1 | 1 |
RXPLL_DIVSEL45_FB | 5 | 5 |
RXPLL_DIVSEL_FB | 2 | 4 |
RXPLL_DIVSEL_OUT | 1 | 2 |
VCO (GHz) | 1.25 | 2.5 |
RXPLL_CP_CFG | 39 | 0D |
For 1.25G:
The VCO cannot be lowered at 1.25G and the user must implement the double GTXTEST pulse as described in (Xilinx Answer 35681).
This issue is to be fixed in the next release of the Core (v5.6) which is currently scheduled for the ISE 13.1 software release.
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
40519 | Serial RapidIO v5.6 - Release Notes and Known Issues for ISE Design Suite 13.1 | N/A | N/A |
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
40519 | Serial RapidIO v5.6 - Release Notes and Known Issues for ISE Design Suite 13.1 | N/A | N/A |
35681 | Virtex-6 GTX Transceiver - MMCM fails to lock and TX/RXRESETDONE fails to assert | N/A | N/A |
AR# 35570 | |
---|---|
日期 | 12/15/2012 |
状态 | Active |
Type | 综合文章 |
IP |