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  3. AR# 34322: MIG 7 Series and Virtex-6 DDR2/DDR3 - MIG Options

AR# 34322

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MIG 7 Series and Virtex-6 DDR2/DDR3 - MIG Options

描述

This section of the MIG Design Assistant focuses on the available MIG options for 7 Series and Virtex-6 DDR3/DDR2 designs. The MIG tool is designed to walk users through generation of a MIG core without needing to refer to additional documentation. If questions do exist on a specific MIG option, please refer to the DDR2 and DDR3 SDRAM Memory Interface Solution > Getting Started with the CORE Generator Tool > Creating Virtex-6 FPGA DDR3 Memory Controller Block Design section within The Virtex-6 FPGA Memory Interfaces User Guide or DDR2 and DDR3 SDRAM Memory Interface Solution > Getting Started with the CORE Generator Tool > Creating 7 Series FPGA DDR3 Memory Controller Block Design section within the 7 Series FPGAs Memory Interface Solutions User Guide.

Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243). The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

解决方案

For information on the specific features supported by the MIG 7 Series and Virtex-6 DDR3/DDR2 designs, please see:

(Xilinx Answer 34316) - MIG Virtex-6 DDR2/DDR3 - Supported Features
(Xilinx Answer 51676) - MIG 7 Series DDR2/DDR3 - Supported Features

Customers often have further questions on the pin-out and banking requirements of the core. You can find information on these requirements on the Description Tab of the Bank Selection tab in the MIG tool. For more information, please see:

(Xilinx Answer 34308) - MIG Virtex-6 DDR2/DDR3 - Verify Pin-Out/Banking Requirements are met.
(Xilinx Answer 51317) - MIG 7 Series DDR2/DDR3 - Verify Pin-out/Banking Requirements are met.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
34283 MIG Solution Center Design Assistant - 7 Series and Virtex-6 FPGA Core Generation N/A N/A

子答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
34308 MIG Virtex-6 DDR3/DDR2 - Verify pin-out/banking requirements are met N/A N/A
51317 MIG 7 Series DDR2/DDR3 - Verify pin-out/banking requirements are met N/A N/A
51676 MIG 7 Series Solution DDR2/DDR3 - Supported Features N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
34316 MIG Virtex-6 DDR2/DDR3 - Supported Features N/A N/A
34283 MIG Solution Center Design Assistant - 7 Series and Virtex-6 FPGA Core Generation N/A N/A
34266 Xilinx Virtex-6 MIG Solution Center - Design Assistant N/A N/A
34308 MIG Virtex-6 DDR3/DDR2 - Verify pin-out/banking requirements are met N/A N/A
AR# 34322
日期 10/04/2012
状态 Active
Type 解决方案中心
器件 More Less
IP
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