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  3. AR# 33836: Virtex-6 FPGA Integrated Block Wrapper v1.4 for PCI Express - Cannot Generate x8 GEN 2 Core for LX130T device using -2 speedgrade

AR# 33836

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Virtex-6 FPGA Integrated Block Wrapper v1.4 for PCI Express - Cannot Generate x8 GEN 2 Core for LX130T device using -2 speedgrade

描述


Known Issue: v1.4

The CORE Generator software does not allow me to generate a x8 GEN 2 core when I target a Virtex-6 LX130T device in -2 speedgrade.

解决方案


To work around this problem, generate the 8-lane Gen2 product for 6VLX130T in a -3 speedgrage, and update the generated UCF for the speedgrade change.

Revision History
12/02/2009 - Initial Release

链接问答记录

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
33763 Virtex-6 FPGA Integrated Block Wrapper v1.4 for PCI Express - Release Notes and Known Issues for ISE Design Suite 11.4 and 11.5 N/A N/A
AR# 33836
日期 12/15/2012
状态 Active
Type 综合文章
IP
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