User-Specified SLR Assignments for Kernels

Dynamic platforms generally assume that the implementation tools will place a kernel in the same super logic region (SLR) as the memory bank that it accesses. If competition for logic resources leads to situations where a kernel is not automatically placed in the correct SLR, you can provide extra input to the xocc tools to assign the logic of the kernel into a nominated SLR. When you provide this explicit directive to place one or more kernels in an SLR, this information is shared with the memory subsystem of the dynamic platform, which automatically adds SLR-crossing pipelines to facilitate better timing closure in the platform.

IMPORTANT!: The following features are currently only applicable to KCU1500 and VCU1525 dynamic platforms containing an SDx memory subsystem instance.

Specifying SLR assignment information for a platform design requires two steps:

Create a User Post System Link Tcl file:
To assign a kernel to a specific SLR, the user must first create a userPostSysLink.tcl file. This file should contain one or more of the following set property assignments:
```
set_property CONFIG.SLR_ASSIGNMENTS <NAME OF SLR> \
[get_bd_cells insert_kernel_name_here]
```
Where <NAME OF SLR> is the string name of the SLR (SLR0, SLR1, SLR2, ...) where the you want the logic of the kernel to reside. For example:
```
set_property CONFIG.SLR_ASSIGNMENTS SLR0 [get_bd_cells vadd_0]
set_property CONFIG.SLR_ASSIGNMENTS SLR1 [get_bd_cells vadd_1]
set_property CONFIG.SLR_ASSIGNMENTS SLR0 [get_bd_cells vadd_2]
```
Provide additional xocc options to apply a user post-system link Tcl file (userPostSysLink.tcl) to platform linking:
When all the necessary SLR_ASSIGNMENTS properties are captured in the userPostSysLink.Tcl file,you can specify the following additional option on the xocc command line to apply the assignments to their design:
```
--xp param:compiler.userPostSysLinkTcl=<full path to your userPostSysLink.tcl file>
```
IMPORTANT!: The full file system path to the Tcl file must be provided. Relative paths are not supported by the xocc command at this time.

Requirements for DSA Creation

The SLR automation feature of the IP integrator is currently only available when a set_param is enabled:

set_param ips.enableSLRParameter 2

The supported platform DSAs (KCU1500/VCU1525) ensure that this parameter is enabled in their DSA pre-system link Tcl hook. The set_param should ideally be assigned before the project is opened or, at the very latest, before any IP integrator design is opened or created.

If applying this feature to a new DSA using 2017.4, ensure that set_param is applied in the DSA pre-link Tcl hook file.

Guidelines for Kernels that Access Multiple Memory Banks

The memory banks of a DSA are distributed across the SLRs of the platform and because the number of connections available for crossing between SLRs is limited, the general guidance is to place a kernel in the same SLR as the memory banks with which it has the most connections. This reduces competition for SLR-crossing connections and avoids consuming extra logic resources associated with SLR crossing.

As shown in the previous figure, when a kernel has a single AXI interface that maps only a single memory bank, the DSA release information lists the SLR that is associated with the memory bank of the kernel; therefore, the SLR where the kernel would be best placed. In this simple scenario, the design tools might automatically place the kernel in that SLR without need for extra input; however, you might need to provide an explicit SLR assignment for some of the kernels under the following conditions:

If the design contains a large number of kernels accessing the same memory bank
A kernel requires some specialized logic resources that are not available in the SLR of the memory bank

When a kernel has multiple AXI interfaces and all of the interfaces of the kernel access the same memory bank, then it can be treated in a very similar way to the kernel with a single AXI interface, and the kernel should reside in the same SLR as the memory bank that its AXI interfaces are mapping.

When a kernel has multiple AXI interfaces to mulitple memory banks in different SLRs, the recommendation is to place the kernel in the SLR that has the majority of the memory banks accessed by the kernel (shown it the figure above). This minimizes the number of SLR crossings required by this kernel which leaves more SLR crossing resources available for other kernels in the user's design to reach their memory banks.

When the kernel is mapping memory banks from different SLRs, explicitly specify the SLR assignment for the kernel in a userPostSysLink.tcl file.

As shown in the previous figure, when a platform contains more than two SLRs, it is possible that the kernel might map a memory bank that is not in the immediately adjacent SLR to its most commonly mapped memory bank. When this scenario arises, memory accesses to the distant memory bank must cross more than one SLR boundary and incur additional SLR-crossing resource costs. To avoid such costs it might be better to place the kernel in an intermediate SLR where it only requires less expensive crossings into the adjacent SLRs.