pragma HLS clock

Description

Applies the named clock to the specified function.

C and C++ designs support only a single clock. The clock period specified by create_clock is applied to all functions in the design.

SystemC designs support multiple clocks. Multiple named clocks can be specified using the create_clock command and applied to individual SC_MODULEs using pragma HLS clock. Each SC_MODULE is synthesized using a single clock.

Syntax

Place the pragma in the C source within the body of the function. 

#pragma HLS clock domain=<clock>

Where:

  • domain=<clock>: Specifies the clock name.
IMPORTANT!: The specified clock must already exist by the create_clock command. There is no pragma equivalent of the create_clock command. See the Vivado Design Suite User Guide: High-Level Synthesis (UG902) for more information.

Example 1

Assume a SystemC design in which the top-level, foo_top, has clocks ports fast_clock and slow_clock. However, foo_top uses only fast_clock within its function. A sub-block, foo_sub, uses only slow_clock.

In this example, the following create_clock commands are specified in the script.tcl file which is specified when the Vivado HLS tool is launched: 

create_clock -period 15 fast_clk
create_clock -period 60 slow_clk

Then the following pragmas are specified in the C source file to assign the clock to the specified functions, foo_sub and foo_top: 

foo_sub (p, q) {
  #pragma HLS clock domain=slow_clock
  ...
}
void foo_top { a, b, c, d} {
  #pragma HLS clock domain=fast_clock
  ...

See Also

  • Vivado Design Suite User Guide: High-Level Synthesis (UG902)