AR# 76343

|

2020.3 Versal Advanced IO Wizard - Issues with Timing Closure for some configurations

描述

In the 2020.3 version of the Versal Advanced IO Wizard, the deskew circuitry for the included PLL can potentially cause Setup/Hold violations at high datarates.

Timing violations are not expected for typical designs. Multi-bank designs are more susceptible.

解决方案

The issue can occur for a Mutli-bank interface configuration if the Single Bank has both RX and TX where the serialization factors are different or if enable_all_ports is used on the Advanced Tab.

An updated deskew circuitry for the PLL will be provided in a future version of the Advanced IO Wizard to resolve the timing violations.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
73634 Versal Advanced IO Wizard - Known Issue List N/A N/A
AR# 76343
日期 06/21/2021
状态 Active
Type 已知问题
器件
Tools
People Also Viewed