In Vivado 2019.2.1, the UltraScale+ SEM IP adds support for XCZU46DR, XCZU47DR, XCZU48DR and XCZU49DR RFSoC devices.
(PG187) will be updated in a future release with relevant data for these devices.
Performance data and essential bits storage size for these devices are below.
Table 2-2: Maximum Number of Configuration Frames:
| Device | MF (Dec) | MF (Hex) | |
| UltraScale+ | XCZU46DR | 68119 | 00010A17 |
| XCZU47DR | 68119 | 00010A17 | |
| XCZU48DR | 68119 | 00010A17 | |
| XCZU49DR | 68119 | 00010A17 | |
Table 2-6: Maximum Start-up Latency at ICAP Fmax for UltraScale+ Devices:
| Device | Boot Time at ICAP Fmax (ms) | Initialization Time at ICAP Fmax (ms) | |
| UltraScale+ | XCZU46DR | 127 | 106 |
| XCZU47DR | 127 | 106 | |
| XCZU48DR | 127 | 106 | |
| XCZU49DR | 127 | 106 | |
Table 2-8: Maximum IP Error Detection Times at ICAP Fmax for UltraScale+ Devices:
| Device | Detection Time at ICAP Fmax (ms) | |
| UltraScale+ | XCZU46DR | 40 |
| XCZU47DR | 40 | |
| XCZU48DR | 40 | |
| XCZU49DR | 40 | |
Table 3-7: External Storage Requirements:
| Device | Storage Requirements for Error Classification (Mb) | |
| UltraScale+ | XCZU46DR | 256 |
| XCZU47DR | 256 | |
| XCZU48DR | 256 | |
| XCZU49DR | 256 | |
| AR# 73243 | |
|---|---|
| 日期 | 12/18/2019 |
| 状态 | Active |
| Type | 综合文章 |
| 器件 | |
| Tools | |