When I simulate the MIPI D-PHY RX or the MIPI CSI-2 RX Subsystem, why do I see the following warning?
ncelab: *W,CSINFI (/dphy_ip/mipi_dphy.srcs/sources_1/ip/mipi_dphy_rx1/mipi_dphy_rx1_core.v,436|49): implicit wire has no fanin
(:mipi_csi2_ui_tb:mipi_csi2_rx_slv1_inst:csi2_rx_top_wrp_slv1_inst:csi2_rx_top_slv1_inst.phy_wrapper.
mipi_dphy_rx1.slave_rx.system_rst_in).
This issue is resolved in the MIPI D-PHY Rx v4.0 and MIPI CSI-2 RX Subsystem v3.0 in Viavdo 2017.3 and later versions.
Users can safely ignore this warning when using the MIPI D-PHY RX.
"system_rst_in" is only used in the MIPI D-PHY TX configuration.
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
54550 | LogiCORE IP MIPI D-PHY - Release Notes and Known Issues for the Vivado 2015.3 tool and later versions | N/A | N/A |
AR# 69531 | |
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日期 | 04/09/2018 |
状态 | Active |
Type | 综合文章 |
IP |