AR# 68077

描述

Zynq UltraScale+ MPSoC supports the use of an AXI Performance Monitor (APM) sample clock via Common Clock Framework (CCF).

As a result the user does not need to determine the frequency themselves.

解决方案

Follow the steps below to enable an APM sample clock via CCF:

1) Enable CCF in the kernel config:

$ petalinux-config -c kernel
-> Device Drivers
-> Common Clock Framework
-> [*] Support for Xilinx ZynqMP Ultrascale+ clock controllers

2) Apply the attached patch to the kernel only if this patch does not exists. Copy the linux kernel source from the PetaLinux install path to the local project as shown.

{PROJECT_PATH}$ cp -r {PETALINUX_TOOLS_INSTALL}petalinux-v2016.3/petalinux-v2016.3-final/components/linux-kernel/ components/

Apply the APM patch (apm-ccf.patch) to the local kernel source as shown. 

Make sure you apply the patch with the "--dry-run" option which will check for errors.

{PROJECT_PATH}/components/linux-kernel/xlnx-4.6 $ patch -p1 --dry-run < ../apm-ccf.patch
{PROJECT_PATH}/components/linux-kernel/xlnx-4.6 $ patch -p1 < ../apm-ccf.patch

3) Now add the following to the clock node in system-top.dts, which is lsbus as it is driven by the Asynchronous Peripheral Mode (APM) for the Zynq UltraScale+ MPSoC.

&apm1 {
clocks = <&clkc 31>;
};

附件