I am using the 1G/2.5G Ethernet PCS/PMA or SGMII core.
In Vivado 2016.2 and prior versions, the SGMII over LVDS option is not enabled for -2 and -3 Artix and Zynq devices which do not have transceivers, even for supported devices.
This issue is seen with Vivado 2016.2 and previous versions.
You can generate the core using a Tcl flow as a work around.
For example:
create_ip -name gig_ethernet_pcs_pma -vendor xilinx.com -library ip -version 15.2 -module_name gig_ethernet_pcs_pma_0
set_property -dict [list CONFIG.SupportLevel {Include_Shared_Logic_in_Core} CONFIG.Standard {SGMII} CONFIG.Physical_Interface {LVDS}] [get_ips gig_ethernet_pcs_pma_0]
This issue is fixed in Vivado 2016.3.
AR# 67931 | |
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日期 | 09/29/2016 |
状态 | Active |
Type | 已知问题 |
器件 | |
Tools | |
IP |