I have created a custom IP core containing the MIG IP and when I add this to a larger project, I get the following error on generation of the IP:
ERROR: [xilinx.com:ip:mig_7series:2.3-0] mig_dft2: Code generation aborted: Can not read PRJ file: f:/ambrosef/CASE_10149596/use_nondft_loc/project_1/project_1.srcs/sources_1/ip/example_top_nonbd/src/mig_dft2/mig_a.prj
CRITICAL WARNING: [IP_Flow 19-1747] Failed to deliver file 'c:/Xilinx/Vivado/2015.1/data/ip/xilinx/mig_7series_v2_3/xit/synthesis.xit':
ERROR: [IP_Flow 19-167] Failed to deliver one or more file(s).
ERROR: [IP_Flow 19-3505] IP Generation error: Failed to generate IP 'mig_dft2'. Failed to generate 'Synthesis' outputs:
ERROR: [IP_Flow 19-98] Generation of the IP CORE failed.
Failed to generate IP 'mig_dft2'. Failed to generate 'Synthesis' outputs:
Why does this occur?
Is this a Known Issue and can it be avoided?
This is a Known Issue and has been seen to occurs in the following scenarios.
2014.3 and 2014.4:
1) When the MIG core is included in an RTL project and that project is packaged into a custom IP using the IP Packager.
If the resulting IP core is used in an IP Integrator Block Design, (BD), then the generation of that BD will fail with the error above.
To work around this issue, do the one of the following:
2) This can also occur when generating the custom IP in an RTL project, however, in that case it was found that this only fails if the packaged IP was not placed in the default location that Vivado selects.
If you choose a non-default location for the custom IP repository, then the above issue will occur.
Note: Issue number 2 above will also affect these custom IPs when used in a Block Design.
2015.1
In 2015.1, scenario #1 above is resolved regardless of how the user packages the custom IP, i.e. using either the "Include XCI file" or "Include generated files" option.
However, scenario #2 is still a problem in Vivado 2015.1 and 2015.2 and the same work-arounds apply.
This issue has been fixed in Vivado 2015.3.