Once we have declared Generics or Parameters in our code, it would be nice to pass the value from the simulator by not having to change the HDL source code.
This Answer Record talks more on how to do that with a simple example.
Let us assume we have generic N to set the width of a top level port Q:
entity Counter is
generic (N : positive := 8);
port ( Reset, Clock, UpDn : std_logic;
Q : std_logic_vector(N-1 downto 0));
end entity Counter;
You can pass/override the Generic N or Parameters while compiling the code in Vivado Simulator without any RTL changes.
GUI mode:
1. Go to Project Settings and select Simulation Settings.
2. Under the compilation option, click on the radio button next to Generic/Parameters Options.
4. Close the options and run Simulation.
Command Line mode:
You can pass the generic/parameter value using a switch present with xelab command:
--generic_top arg Override generic or parameter of a top level design unit with specified value
Example: xelab -generic_top "N=12" work.Counter
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
---|---|---|---|
58799 | Xilinx Simulation Solution Center - Design Assistant - Vivado Simulator | N/A | N/A |
AR# 64118 | |
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日期 | 04/02/2015 |
状态 | Active |
Type | 综合文章 |
Tools |