AR# 61009

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2014.x Vivado Synthesis - MREG is always be chosen over PREG if only one of them can be used when inferring DSP48

描述

A change was made to DSP48 inference starting from release 2014.1 so that if there is a choice to be made between MREG and PREG,  Synthesis will always pick the MREG register to avoid pulse width errors.

As a result you might see timing regression on logics inferred into DSP48 when migrating design from 2013.x to 2014.x due to the MREG usage. 

解决方案

This is expected behavior.

To avoid bad timing due to the lack of PREG, add an extra pipeline register so that it can be absorbed as PREG into DSP48.
AR# 61009
日期 08/12/2014
状态 Active
Type 已知问题
Tools
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