There is a known limitation in setting the BIAS_CFG setting without instantiating the GTXE2_COMMON.
GTXE2_COMMON should be placed with the GTXE2_CHANNEL(s) within the same quad.
See (Xilinx Answer 43339) - 7 Series FPGA GTX Transceiver - Software Use Model Changes
However, the GTXE2_COMMON is not always placed in the same quad by the placer and this can lead to the following critical messages during route_design:
Phase 3.1 Initial Routing Verification
Post Initial-Routing Verification
---------------------------------
CRITICAL WARNING: [Route 35-54] Net: i_trif_gtx_common/gtrefclk0[2] is not completely routed.
Resolution: Run report_route_status for more information.
Resolution: Run report_route_status for more information.
Unroutable connection Types:
----------------------------
Type 1 : IBUFDS_GTE2.O->GTXE2_CHANNEL.GTREFCLK0
-----Num Open nets: 8
-----Representative Net: Net[47553] i_trif_gtx_common/gtrefclk0[2]
-----IBUFDS_GTE2_X0Y0.O -> GTXE2_CHANNEL_X0Y2.GTREFCLK0
-----Driver Term: i_trif_gtx_common/g_quad[2].i_ibufds_gte2_0/O Load Term [170722]: g_trif_twin[1].i_trif_twin/g_twin[0].i_trif/i_trif_gtx/gtxe2_i/GTREFCLK0
Phase 3.1 Initial Routing Verification | Checksum: 1037bd02a
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 43339 | 7 Series FPGA GTX Transceiver - Software Use Model Changes | N/A | N/A |
| AR# 60638 | |
|---|---|
| 日期 | 05/14/2014 |
| 状态 | Active |
| Type | 综合文章 |
| 器件 | |
| Tools | |