2. 技术支持
  3. AR 5991X
  4. AR# 59912: XAUI v12.1 - Additional XDC constraints for the MDIO signal inputs to ease timing closure

AR# 59912

|

XAUI v12.1 - Additional XDC constraints for the MDIO signal inputs to ease timing closure

描述

Additional false path constraints can be added to the MDIO logic to ease timing closure.

解决方案

Add the following constraints:

##################################################################

# set a false path from the mdc_in and mdc_in inputs to the first
# stage of the sychronizer register
set_false_path -to [get_cells -hierarchical -filter {NAME =~ */core_name_core/*management_1/mdc_reg_reg[0]}]
set_false_path -to [get_cells -hierarchical -filter {NAME =~ */core_name_core/*management_1/mdio_in_reg_reg[0]}]

These have been added to the core XDC file in 2014.1.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
54666 LogiCORE IP XAUI - Release Notes and Known Issues for Vivado 2013.1 and newer tool versions N/A N/A
AR# 59912
日期 04/17/2014
状态 Active
Type 综合文章
IP
People Also Viewed