AR# 58758
|Licensing - Why do I receive an ERROR: [Common 17-69] saying "This design contains one or more cores for which bitstream generation is not supported"?
描述
I am receiving errors similar to the following:
This design contains one or more cores for which bitstream generation is not supported: displayport_v4_1_rxlink_top
My design containing Tri Mode Ethernet MAC IP will pass through implementation, but fails in bitstream generation.
ERROR: [Common 17-69] Command failed: This design contains one or more cores for which bitstream generation is not supported: TRIMAC_GEN__5, TRIMAC_GEN__6, TRIMAC_GEN__7, TRIMAC_GE
In Vivado 2015.1 the message text was changed slightly to the following:
ERROR: [Common 17-69] Command failed: This design contains one or more cells for which bitstream generation is not permitted: <IP license feature name>
I have bought licenses for the IP in my design.
What could be the cause of the error?
解决方案
This can happen if you generate an IP core with an evaluation license and then purchase or install a full license but do not regenerate the IP core.
When the IP core is generated, the license information is stored in the netlist file and it stays in the netlist file even after you change the license to something else.
If the output products are not updated, then the old license will still be pointed to even after a valid license is installed.
The IP core needs to be generated or re-generated on a machine with access to the full license.
To fix this issue, follow the steps below:
- In the Project Manager Window click on the IP sources tab.
- Select all IP that were affected by the newly installed IP license.
- Right click on the IP and click Reset Output Products.
- Select all IP that were affected by the newly installed IP license again.
- Right click on the IP and click Generate Output Products.
- This will update the netlist file with the new valid license file information.
- Generate bitstream.
You can check the license status for the IP core that is failing by using a Tcl script similar to the following.
set dp_ips [get_cells -hierarchical {displayport*}]
foreach ips $dp_ips {report_property $ips}
Here is an example output:
{x_ipProduct=Vivado 2013.3,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=displayport,x_ipVersion=4.1,
x_ipCoreRevision=0,x_ipLanguage=VERILOG,x_ipLicense=displayport@2013.10(design_linking),
C_COMPONENT_NAME=design_1_displayport_0_0,C_FAMILY=kintex7,
C_FLOW_DIRECTION=1,C_LANE_COUNT=4,C_INCLUDE_HDCP=0,C_SECONDARY_SUPPORT=0,
C_AUDIO_CHANNELS=2,C_IEEE_OUI=000A35,C_VENDOR_SPECIFIC=0,C_PROTOCOL_SELECTION=1,
C_LINK_RATE=20,C_MST_ENABLE=0,C_NUMBER_OF_MST_STREAMS=2,C_MAX_BITS_PER_COLOR=16,
C_QUAD_PIXEL_ENABLE=0,C_DUAL_PIXEL_ENABLE=1,C_YCRCB_ENABLE=1,C_YONLY_ENABLE=0}
The above example is based on the error in the description.
You can substitute 'displayport*' in the first line of the Tcl script, with the name of the IP core failing in your design.
If your IP core is part of the IP Integrator Subsystem (Block Design), then you will need to force a clearing of all the IPI outputs and regenerate.
See (Xilinx Answer 57264) for more details on how to do this.
链接问答记录
相关答复记录
| AR# 58758 | |
|---|---|
| 日期 | 05/09/2016 |
| 状态 | Active |
| Type | 综合文章 |
| Tools | |