AR# 54516

描述

This answer record contains the Release Notes and Known Issues for the LogiCORE IP Asynchronous Sample Rate Converter (ASRC) core and includes the following:

• General Information
• Known and Resolved Issues
• Revision History
  

This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2013.1 and newer tool versions.

For past known issue logs and ISE support information, see the IP Release Notes Guide (XTP025):

https://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf

NOTE: Not recommended for new designs. The core is removed from the IP catalog as of 2014.3

解决方案

General Information

Supported devices can be found in the following location:

• Open the Vivado tool -> IP Catalog,-right click on an IP and select "Compatible Families"

For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.

Table 1 correlates the core version to the first Vivado design tools release version in which it was included.

Table 1: Version

Table 2 provides answer records for general guidance when using the LogiCORE IP Asynchronous Sample Rate Converter (ASRC) core.

Table 2: General Guidance

Known and Resolved Issues

The following table provides known issues for the LogiCORE IP Asynchronous Sample Rate Converter (ASRC) core, starting with v2.0, initially released in Vivado Design Suite 2013.1.

Note: The "Version Found" column lists the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History

• 10/23/2013 - Added v2.0 (Rev. 1) and v2.0 (Rev. 2) to Version Table
• 04/03/2013 - Initial release

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