The 7 Series Integrated Block for PCI Express core does not link up successfully on an Intel Z77 (Ivy Bridge) platform. This affects the out-of-the-box experience for customers wishing to use the Artix-7 FPGA AC701 Evaluation Kit TRD.
This is a known issue for the core implemented in Artix and Kintex devices due toan Intel errata. To work around this issue, please refer to (Xilinx Answer 51135).
An out-of-the-box solution is available to enable customers to run the Artix-7 FPGA AC701 Evaluation Kit TRD. This involves using a particular set of files (.bit and .mcs file) when running the TRD. The files needed,a7_base_trd.bit and AC701.mcs, can be found below.
For information on how to run the Artix-7 FPGA AC701 TRD, please refer to UG964, AC701 Base Targeted Reference Design User Guide, UG964.
| 文件名 | 文件大小 | File Type |
|---|---|---|
| AC701_Ivy_fix.zip | 5 MB | ZIP |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 51900 | Artix-7 FPGA AC701 Evaluation Kit - Known Issues and Release Notes Master Answer Record | N/A | N/A |
| 53372 | Artix-7 FPGA AC701 Evaluation Kit Targeted Reference Design - Release Notes and Known Issues Master Answer Record | N/A | N/A |
| AR# 53489 | |
|---|---|
| 日期 | 03/02/2013 |
| 状态 | Active |
| Type | 已知问题 |
| Boards & Kits | |