In Table 5-3 of the Zynq-7000 PCB Design and Pin Planning Guide (UG933), it states that MIO[8] should be pulled to Vcco_MIO1 to select the voltage for MIO Bank 1.
Is this correct?
No, this is not correct.
All mode pins are located in MIO bank 0 and need to be pulled to Vcco_MIO0 (when appropriate). Mode pins should never be pulled High to Vcco_MIO1.
Pulling them High to Vcco_MIO1 is potentially damaging to the Zynq device.
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 52539 | Zynq-7000 SoC - Board Design | N/A | N/A |
| AR# 52771 | |
|---|---|
| 日期 | 11/20/2012 |
| 状态 | Active |
| Type | 综合文章 |
| 器件 | |