AR# 5140

描述

General Description:

A new flip-flop was introduced in our newer architectures -- it is connected to the tri-state enable of the OBUFT, which allows for faster output enable and disable times. How does one get this flip-flop into the IOB?

解决方案

Utilization of this flip-flop is explained in (Xilinx XAPP123): "Using Three-State Enable Registers in XLA, XV, and Spartan-XL FPGAs."

The associated PERL script can be found on the Xilinx FTP site:

For the PC:

http://www.xilinx.com/txpatches/pub/utilities/fpga/make_macro.zip

For the Workstation:

http://www.xilinx.com/txpatches/pub/utilities/fpga/make_macro.tar.Z