BUFG, or BUFH, with certain limitations, must be used between TXOUTCLK/RXOUTCLK and MMCM or PLL in all Artix-7 devices. For details about placement constraints and restrictions on clocking resources (MMCM, BUFR, BUFH, BUFG, etc.), refer to UG472, 7 Series FPGAs Clocking Resources User Guide.
The incorrect information about BUFR usage is fixed in the next revision of the user guide, v1.2.
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 47852 | 7 Series FPGAs GTP Transceivers - Known Issues and Answer Record List | N/A | N/A |
| AR# 47975 | |
|---|---|
| 日期 | 12/15/2012 |
| 状态 | Active |
| Type | 综合文章 |
| 器件 | |