I am attempting to exercise the interfaces on my Spartan-6 FPGA SP623 Characterization Kit.
What tests can be run to ensure that the interfaces are working correctly?
Spartan-6 FPGA SP623 Characterization Kit Documentation and Reference Designs referenced below can be found on the SP623 Support page.
| Feature | Test Design | Notes |
| SP623 | ||
| Configuration Interfaces | ||
| Configuration ADDRESS Pins | SP623 User Guide (UG751) | Page 16. RDF0098 (0 - IBERT GTP Duals 101 & 123, 1 - IBERT GTP Duals 245 & 267, 2 - Hello, World! UART, 3 - GPIO DIP Switches, 4 - GPIO LEDs) See RDF0098 Readme.txt for more details |
| Configuration System ACE | SP623 User Guide (UG751) | Page 16. RDF0098 (0 - IBERT GTP Duals 101 & 123, 1 - IBERT GTP Duals 245 & 267, 2 - Hello, World! UART, 3 - GPIO DIP Switches, 4 - GPIO LEDs) See RDF0098 Readme.txt for more details |
| Configuration JTAG Interface | SP623 Getting Started (UG752) | JTAG is used for ChipScope Pro, "Setting Up ChipScope Pro Analyzer Tool" section |
| Board Feature Interfaces | ||
| Board I2C Interface | SP623 Getting Started (UG752) | The IBERT Demonstration can use I2C to control the SuperClock-2 Module |
| Board USB Serial UART | SP623 User Guide (UG751) | Page 16. RDF0098 -- Design 2, See RDF0098 Readme.txt for more details |
| Board Power Monitoring Interface (TI PMBus) | (Xilinx Answer 37561) | Written for ML605 but also applicable for SP605; Requires the TI USB EVM Adapter; See (Xilinx Answer 54022) |
| Board CLK Oscillator (200 MHz, differential) | SP623 User Guide (UG751) | All of the GPIO example designs use this as the CLK |
| Board SuperClock-2 Module | SP623 Getting Started (UG752) | The IBERT Demonstration can use the SuperClock-2 as its clock source |
| Board FMC-HPC Connectors | XM105 User Guide (UG537) | Page 29. This is the User Guide for the XM105 mezzanine debug card. This card has DS5, DS6, and DS7 which indicate good power to the board. Debug strategies will vary depending on the specific mezzanine card being used. |
| Transceiver Interfaces | ||
| Transceiver GTP RefCLK (differential) | SP623 Getting Started (UG752) | Page 9, Running the IBERT Demonstration |
| Transceiver GTP Transceiver SMA Connectors (differential) | SP623 Getting Started (UG752) | Page 9, Running the IBERT Demonstration |
| User Specified Interfaces | ||
| User LEDs | SP623 User Guide (UG751) | Page 16. RDF0098 -- Design 4, See RDF0098 Readme.txt for more details |
| User DIP switches | SP623 User Guide (UG751) | Page 16. RDF0098 -- Design 3, See RDF0098 Readme.txt for more details |
| User PushButtons | none available | Modify one of the example designs to accept pushbutton and illuminate an LED |
| Board GPIO Header | none available | These are completely user-driven I/O. Jumper shunts might be possible to do loopback on the header to test them |
| User SMA Connectors (differential) | none available | These are completely user-driven I/O. A good test would be loop back or monitoring differential I/O on a scope. |
| User SMA CLK Connectors (differential) | none available | These are completely user-drive differential clocks. It might be possible to modify an example design to use these instead of the socketed oscillator |
| Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
|---|---|---|---|
| 43748 | Xilinx Boards and Kits - Debug Assistant | N/A | N/A |
| AR# 43847 | |
|---|---|
| 日期 | 01/21/2014 |
| 状态 | Active |
| Type | 综合文章 |
| Boards & Kits | |