2. 技术支持
  3. AR# 4074: M1.4 PAR - DRC incorrectly posts warning about DPRAM D1 pin when it is unused.
  4. AR# 40746: Virtex-6 FPGA GTH Transceiver Wizard v1.7 - Known Issues and Release Notes

AR# 40746

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Virtex-6 FPGA GTH Transceiver Wizard v1.7 - Known Issues and Release Notes

描述

This Answer Record contains the Known Issues and Release Notes for the Virtex-6 FPGA GTH Transceiver Wizard v1.7.

解决方案

Introduction

For installation instructions for this release, see:
http://www.xilinx.com/ipcenter/coregen/ip_update_install_instructions.htm

For system requirements, see:
http://www.xilinx.com/ipcenter/coregen/ip_update_system_requirements.htm

This file contains Release Notes for the Xilinx LogiCORE IP Virtex-6 FPGA GTH Transceiver Wizard v1.7 solution.

For the latest core updates, see the product page: 
http://www.xilinx.com/content/xilinx/en/products/intellectual-property/v6_fpga_gth_transceiver_wizard.html

New Features

  • ISE 13.1 software support
  • Simplex TX/RX feature support
  • Auto-upgrade feature to upgrade from v1.2, v1.3, v1.4, v1.5, v1.6 to v1.7
  • Synplify pro scripts for synthesis

Supported Devices

The following device families are supported by the core for this release: Virtex-6 xc6vhx255t, xc6vhx380t, xc6vhx565t.

Resolved Issues

  • Fixed CR# 584969 - Updated the name of the .xco, .v files and the module names to be identical

Known Issues

The following are known issues for v1.7 of this core at time of release:

  • Limited hardware testing was done for the Virtex-6 GTH Wizard on ML627 board
  • Attribute and port settings for OTU-4 are applicable to single lane only. User has to integrate other OTU-4 compatible logic manually in their design
  • For 16 and 20 bit datapath widths, multiple line rates and multiple datapath widths cannot be selected accross multiple lanes 

The most recent information, including known issues, work-arounds, and resolutions for this version is provided in the IP Release Notes Guide located at: www.xilinx.com/support/documentation/user_guides/xtp025.pdf

Technical Support

To obtain technical support, please open a WebCase:
http://www.xilinx.com/support

Questions are routed to a team with expertise in using this product.

Xilinx provides technical support for use of this product when used according to the guidelines described in the core documentation, and cannot guarantee timing, functionality, or support of this product for designs that do not follow specified guidelines.

Core Release History

 Date  By  Version  Description
 03/01/2011  Xilinx, Inc.  1.7  ISE 13.1 support
 12/14/2010  Xilinx, Inc.  1.6  ISE 12.4 support
 09/21/2010  Xilinx, Inc.  1.5  ISE 12.3 support
 07/23/2010  Xilinx, Inc.  1.4  ISE 12.2 support
 04/19/2010  Xilinx, Inc.  1.3  ISE 12.1 support
 12/02/2009  Xilinx, Inc.  1.2  ISE 11.4 support
 09/16/2009  Xilinx, Inc.  1.1  Initial release

链接问答记录

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
38596 Virtex-6 FPGA GTH Transceiver - Known Issues and Answer Records List N/A N/A
AR# 40746
日期 11/10/2014
状态 Active
Type 综合文章
器件
IP
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