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  3. AR# 3717: How to import Synplify's XNF netlist into the Foundation schematic?

AR# 3717

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How to import Synplify's XNF netlist into the Foundation schematic?

描述


General Description:



How to instantiate XNF netlist imported from Synplicity's Synplify

into the Foundation schematic editor?

解决方案


If the customer wishes to take an XNF file from Synplify and create a

module for it in a Foundation schematic, then the XNF file should be a

"lower-level" file, not a top-level. This means that it should not have

EXTs and IBUF/OBUFs. Rather, it should simply have SIG records for all

the ports. Secondly, the importing of the XNF macro works most smoothly

when the bus indices are notated like DATA<0>, DATA<1>, etc. (Synplify

follows this convention)



To create the "lower-level" XNF file within Synplify, select Target ->

Set Device Options -> Disable I/O Insertion from the menu, then the I/O

cells will not be inserted and EXT records will not be created. However,

the SIG records will not be created if customers are using a version of

Synplify that pre-dates Synplify 3.0c1. Customers are urged to upgrade to

a more recent version of Synplify from Synplicity:



http://www.synplicity.com/support.html


Put this file into the project directory. Go to Foundation schematic

editor, select Hierarchy -> create macro symbol from netlist, and choose

the modified XNF file. The symbol whose name is the same as the XNF file

will be added to the component library.



Customers are urged to migrate to a version of Foundation above F1.3.

In F1.3, when the XNF file was imported into Foundation, the XNF was being converted

into EDIF. In the process of doing this, some XNF-specific attributes

(specifically INV properties on pins) were being lost. Actually, the INV

property was being passed to the EDIF, but INV is not a legal EDIF

property, thus is was being ignored. The workaround for this problem

was to create a black-box symbol, and point to the XNF file. Then,

there was another problem in how the bus pins weren't getting matched to

the underlying netlist when the symbol was created manually, and thus

the NEXT workaround of creating individual pins for each bit of the

bus. In F1.4, Foundation no longer converts the XNF file into EDIF upon

importation. Now, the XNF is treated like a black-box, and the Xilinx

translation tools (NGDBUILD) take care of converting the XNF to NGD. The

bus issue is also resolved, because upon importing the XNF file, the

symbol is created properly. In F1.4, these problems are resolved.
AR# 3717
日期 06/21/2011
状态 Archive
Type 综合文章
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