AR# 35499

描述

An issue exists with the generation of the mcb_wr_full flag used within the MIG v3.4 Spartan-6 FPGA Traffic Generator for the 128-bit Bi-Directional port configuration. The Traffic Generator is provided with the MIG output Example Design. If the User Design or any other port configuration is used, this issue will not exist.

The issue is seen in hardware where calibration completes but the MCB appears to hang when the Traffic Generator should start transferring data. This behavior may not always occur. Calibration may complete and the Traffic Generator issue no errors during one run and then the next run the issue occurs.

Manual modification to the Traffic Generator is required to work around this issue. This issue affects only the 128-bit Bi-Directional port configuration for the MIG v3.4 Example Design output (including designs targeted to the SP601/SP605 development boards). The issue will be resolved in MIG v3.5 which will be available with ISE 12.2 software.

解决方案

To work around this issue:

1. Open the mcb_traffic_gen.v/.vhd module provided in the "example_design/rtl/traffic_gen" directory.

2. Locate the following code (starting on line 317)

reg mcb_rd_empty;
always @ (mcb_rd_empty_i, mcb_rd_empty_r)
if ( FAMILY == "SPARTAN6")
mcb_rd_empty = mcb_rd_empty_r;
else
mcb_rd_empty = mcb_rd_empty_i;

reg mcb_wr_full;
always @ (mcb_wr_full_i, mcb_wr_full_r1)
if ( FAMILY == "SPARTAN6")
mcb_wr_full = mcb_wr_full_r1;
else
mcb_wr_full = mcb_wr_full_i;

wire mcb_rd_empty;
assign mcb_rd_empty = mcb_rd_empty_i;

wire mcb_wr_full;
assign mcb_wr_full = mcb_wr_full_i;

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