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  3. AR# 3404: 8.1i CPLD XC9500 Family - How do I use programmable grounds for unused pins in XC9500/XL/XV devices?
  4. AR# 34046: MIG v3.3-v3.5, Spartan-6 LPDDR - Calibrated and Un-Calibrated Input Termination features not supported

AR# 34046

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MIG v3.3-v3.5, Spartan-6 LPDDR - Calibrated and Un-Calibrated Input Termination features not supported

描述


MIG v3.3 allows the following Memory Input Termination options for Spartan-6 MCB LPDDR designs:
 
  • Calibrated Input Termination
  • Un-Calibrated Input Termination
  • External Input Termination

MIG 3.4/3.5 allow the following Memory Input Termination options for Spartan-6 MCB LPDDR designs:
  • Un-Calibrated Input Termination
  • External Input Termination

LPDDR is a non-terminated standard making these options invalid.

Typically, termination is not required for LPDDR interfaces as long as the PCB guidelines in the MCB User Guide are followed.

External terminations can be added for special circumstances if desired, but IBIS simulation is recommended to ensure good signal integrity.

解决方案


To work around this, select External Input Termination.

Selecting this option sets up the appropriate I/O Standards in the output MIG UCF.

Users then would not terminate externally since LPDDR is a non-terminated standard.

Selecting Calibrated Input Termination specifies the MOBILE_DDR standard for all of the interface pins, including RZQ and ZIO.

However, this is a non-Vref based standard, and therefore, the termination tuning algorithm will not work correctly.

The tuned termination values would be invalid and would likely degrade the signal quality of the interface.

Please ensure External Input Termination is selected.

MIG 3.6, to be released with ISE 12.3, removes the above three options for LPDDR.

In addition to the GUI including the incorrect options, previous releases of the Spartan-6 FPGA Memory Controller User Guide incorrectly stated:

"The Soft Calibration Module relies on the VREF supply required for SST I/O standards to perform the necessary input termination calibration.
When a different I/O standard is used (for example, for Mobile DDR) that normally would not require a VREF supply, an external VREF source must still be provided if a calibrated input termination is desired."

VREF should not be used with LPDDR, and so this comment is invalid.

The version of the user guide released on June 14, 2010 has this statement removed.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
34587 MIG v3.4 - Release Notes and Known Issues for ISE Design Suite 12.1 N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
35180 Spartan-6 - 12.4 Software Known Issues related to the Spartan-6 FPGA N/A N/A
34587 MIG v3.4 - Release Notes and Known Issues for ISE Design Suite 12.1 N/A N/A
34055 MIG Spartan-6 FPGA MCB - What are the requirements for the RZQ and ZIO pins? N/A N/A
AR# 34046
日期 09/02/2014
状态 Active
Type 综合文章
器件
IP
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