AR# 31698

描述

This Answer Record contains the Release Notes and Known Issues for AccelDSP Synthesis Tool 10.1.03.

解决方案

Release Notes and Known Issues for AccelDSP Synthesis Tool 10.1.03

AccelDSP Synthesis Tool 10.1.03 is a minor update. Please read the documentation, as it answers questions you might have about changes to the functionality or the look from previous versions. The AccelDSP Synthesis Tool User Guide is accessible in PDF format at:

http://www.xilinx.com/ise/dsp_design_prod/acceldsp/index.htm

Software Support

- What software is required to install AccelDSP Synthesis Tool? See (Xilinx Answer 17966).

AccelDSP Synthesis Tool Enhancements

New Directives

Use LogiCORE Directive

- The use_logicore directive tells AccelDSP to use a LogiCORE for the specified operator(s) in the design. LogiCOREs supported in this release are Accumulator, Multiplier, Multiply Accumulator, and Multiply Adder.

- You can also use this directive to override the Use LogiCOREs project option. For example, assume that the Use LogiCOREs project option is set to true and you discover that the automatic latency causes the performance to decrease because of design feedback. You can use this directive to disable the use of a LogiCORE for this one operator.

InsertPipeStage Directive - New enable Parameter

- A new optional parameter call "enable" has been added to the insertpipestage directive. This allows you to specify whether or not an associated hierarchical directive is enabled or disabled.

Memmap Directive - New register_output Parameter

- A new parameter called "register_output" has been added to the memmap directive. This allows you to specify whether or not the output of the memory is registered.

General Issues

- How do I switch between MATLAB versions used with AccelDSP? See (Xilinx Answer 22966).

- Is there a way to terminate or kill a process once I have launched the next step in my design flow? See (Xilinx Answer 31602).

- When running the Generate RTL step, error messages occur (because of certain coding styles): "E-ERR-0009): Failed to generate RTL model from fixed-point design for unknown reasons!" or "Out of memory."See (Xilinx Answer 31098).

- When I launch AccelDSP, why do I receive "Error: Could not load the syntax highlighting File.invalid command name "AppInfo::Appinfo" while executing "Appinfo::Appinfo ProductDir"? See (Xilinx Answer 30695).

- AccelDSP appears to hang when I launch it, or it takes a long time to initialize. See (Xilinx Answer 31293)

- Why do my Hardware Co-Simulation targets disappear after installing the DSP Tools 10.1 Service Pack 2? See (Xilinx Answer 31389).