AR# 31265

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10.1.02, AccelDSP Synthesis Tool - Release Notes/README and Known Issues List

描述

This Answer Record contains the Release Notes and Known Issues for AccelDSP Synthesis Tool 10.1.02.

解决方案

Release Notes and Known Issues for AccelDSP Synthesis Tool 10.1.02

AccelDSP Synthesis Tool 10.1.02 is a minor update. Please read the documentation, as it answers questions you might have about changes to the functionality or the look from previous versions. The AccelDSP Synthesis Tool User Guide is accessible in PDF format at:

http://www.xilinx.com/ise/dsp_design_prod/acceldsp/index.htm

Software Support

- What software is required to install AccelDSP Synthesis Tool? See (Xilinx Answer 17966).

AccelDSP Synthesis Tool Enhancements

LogiCORE IP Core mapping

- This release is the first to support the use of highly optimized Xilinx LogiCORE IP Cores during RTL generation.

- The multiplier core is the first core that is supported, with more cores to follow in future releases.

- This feature is controlled by means of the following new project option: SetProjectOption -use_logicores 1.

Increasing Fmax

- To reduce critical paths that occur at the output port of a memory, AccelDSP can automatically add a register to increase the maximum frequency.

- This feature is controlled by means of the following new project option: SetProjectOption --memmap_defaults {{register_output 1}}.

MATLAB 2008a

MATLAB 2008a is now supported by AccelDSP. For information on switching versions of MATLAB, see (Xilinx Answer 22966).

General Issues

- How do I switch between MATLAB versions used with AccelDSP? See (Xilinx Answer 22966).

- Is there a way to terminate or kill a process once I have launched the next step in my design flow? See (Xilinx Answer 31602).

- When running the Generate RTL step, error messages occur (because of certain coding styles): "E-ERR-0009): Failed to generate RTL model from fixed-point design for unknown reasons!" or "Out of memory." See (Xilinx Answer 31098).

- When I launch AccelDSP, why do I receive "Error: Could not load the syntax highlighting File.invalid command name "AppInfo::Appinfo" while executing "Appinfo::Appinfo ProductDir"? See (Xilinx Answer 30695).

- AccelDSP appears to hang when I launch it, or it takes a long time to initialize. See (Xilinx Answer 31293)

- Why do my Hardware Co-Simulation targets disappear after installing the DSP Tools 10.1 Service Pack 2? See (Xilinx Answer 31389).

AR# 31265
日期 12/15/2012
状态 Archive
Type 综合文章
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