AR# 23000

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11.3 System Generator for DSP - An indeterminate input data (also known as a NAN) error occurs when the design is simulated

描述

An indeterminate input data error occurs when I simulate my design, as shown in the following example error message:

"Error reported by S-function 'xlslice' in 'cic2/CORDIC ATAN/CORDIC Fine Angle PE/CORDIC PE1/Slice':

--- The Slice Block received a data word with the valid bit set to true, but the data in an indeterminate ("don't care") state. This condition indicates a usage error when the output type is boolean. Care must be taken when asserting that data samples flowing to the Slice Block are valid."

解决方案

Indeterminate data is equivalent to an Undefined or Unknown in HDL simulations. Many System Generator blocks can accept this data at its input ports. However, if an input to a block is defined as a Boolean data type, then indeterminate data is not allowed. By definition, a Boolean can only be a '1' or a '0'.

In this case, there are several possible solutions to work around this unknown data and the resulting error messages in the System Generator for DSP.

Option 1: Add Enabled Registers (helps to pipeline the design)

  • Turn on the valid ports for the IP.
  • Set the input of the Valid In port on the IP block to a Constant 1.
  • Place a register on the output of the IP and connect the Valid Out to the Enable on the Register. This prevents the DA FIR invalid outputs from passing to any downstream components in the design.

Option 2: Use Configurable Subsystem

  • You can resolve this issue with the indeterminate probe block on the output of the IP. Use this probe to drive the select signal of a MUX and select between the actual data and a constant ("0" for example).
  • Place this design in a configurable subsystem that selects between a wire and the detection circuit describedabove for generation and simulation. Note that the indeterminate probe output must go through a Gateway In to drive the mux.

For more information on using configurable subsystems and the Indeterminate Probe, see the System Generator for DSP User Guide.

Option 3: Use Simulation MUX

  • You can resolve this issue with the indeterminate probe block on the output of the IP. Use this probe to drive the select signal of a MUX and select between the actual data and a constant ("0" for example).
  • Use the Simulation MUX block to switch between a wire and the detection circuit.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
29595 Xilinx DSP Tools, System Generator for DSP, and AccelDSP Synthesis Tool - Release Notes and Known Issues N/A N/A
AR# 23000
日期 03/06/2013
状态 Active
Type 综合文章
Tools
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