产品描述

The Arasan I3C Device Controller IP Core implements Device functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is used for various sensors in the mobile/automotive system where an I3C Master transfers data and control information between itself and various sensor devices. The I3C Device Controller IP Core can be easily integrated into the Sensor/Device devices with minimal gate count. The I3C Device controller is highly configurable (synthesis time) to provide an optimal solution based on the Device’s requirements. This includes, acting as a legacy I2C device, Support for Dynamic Address Assignment, HDR (any of the three defined HDR Modes), and optional APB Interface for more SOC type integration. In addition, optional I3C Device functions like Interrupt generation, Hot-Join request generation and advanced Device with secondary master capabilities can be configured for more complex Devices. The I3C Device Controller also supports both Synchronous and Asynchronous Time stamping functions by providing the support for SETXTIME/GETXTIME commands. Also, the I3C Device Controller IP provides direct signaling to connect to the IO Buffers (SCL and SDA). Tools used Vivado 2022.1 Arasan's IP is also available to license for ASIC applications. Arasan offers a licensing scheme to go from FPGA to ASIC at reduced license fees. Customers can migrate to ASIC by licensing Arasan’s I3C CONTROLLER & I3C PHY IP core for ASIC.