Cross-Triggering in Zynq UltraScale+ MPSoC
In Zynq® UltraScale+™ MPSoC, ECT is configured with four broadcast channels, nine CTIs, and a CTM. The table below shows the trigger input and trigger output connections of each CTI. These are hard-wired connections. For more details, refer to Zynq UltraScale+ MPSoC Technical Reference Manual.
CTI Trigger Port | Signal |
---|---|
CTI 0(soc_debug_fpd) |
|
IN 0 |
ETF 1 FULL |
IN 1 |
ETF 1 ACQCOMP |
IN 2 |
ETF 2 FULL |
IN 3 |
ETF 2 ACQCOMP |
IN 4 |
ETR FULL |
IN 5 |
ETR ACQCOMP |
IN 6 |
- |
IN 7 |
- |
OUT 0 |
ETF 1 FLUSHIN |
OUT 1 |
ETF 1 TRIGIN |
OUT 2 |
ETF 2 FLUSHIN |
OUT 3 |
ETF 2 TRIGIN |
OUT 4 |
ETR FLUSHIN |
OUT 5 |
ETR TRIGIN |
OUT 6 |
TPIU FLUSHIN |
OUT 7 |
TPIU TRIGIN |
CTI 1(soc_debug_fpd) |
|
IN 0 |
FTM |
IN 1 |
FTM |
IN 2 |
FTM |
IN 3 |
FTM |
IN 4 |
STM TRIGOUTSPTE |
IN 5 |
STM TRIGOUTSW |
IN 6 |
STM TRIGOUTHETE |
IN 7 |
STM ASYNCOUT |
OUT 0 |
FTM |
OUT 1 |
FTM |
OUT 2 |
FTM |
OUT 3 |
FTM |
OUT 4 |
STM HWEVENTS |
OUT 5 |
STM HWEVENTS |
OUT 6 |
- |
OUT 7 |
HALT SYSTEM TIMER |
CTI 2(soc_debug_fpd) |
|
IN 0 |
ATM 0 |
IN 1 |
ATM 1 |
IN 2 |
- |
IN 3 |
- |
IN 4 |
- |
IN 5 |
- |
IN 6 |
- |
IN 7 |
- |
OUT 0 |
ATM 0 |
OUT 1 |
ATM 1 |
OUT 2 |
- |
OUT 3 |
- |
OUT 4 |
- |
OUT 5 |
- |
OUT 6 |
- |
OUT 7 |
picture debug start |
CTI 0,1 (RPU) |
|
IN 0 |
DBGTRIGGER |
IN 1 |
PMUIRQ |
IN 2 |
ETMEXTOUT[0] |
IN 3 |
ETMEXTOUT[1] |
IN 4 |
COMMRX |
IN 5 |
COMMTX |
IN 6 |
ETM TRIGGER |
IN 7 |
- |
OUT 0 |
EDBGRQ |
OUT 1 |
ETMEXTIN[0] |
OUT 2 |
ETMEXTIN[1] |
OUT 3 |
-(CTIIRQ, not connected) |
OUT 4 |
- |
OUT 5 |
- |
OUT 6 |
- |
OUT 7 |
DBGRESTART |
CTI 0,1,2,3 (APU) |
|
IN 0 |
DBGTRIGGER |
IN 1 |
PMUIRQ |
IN 2 |
- |
IN 3 |
- |
IN 4 |
ETMEXTOUT[0] |
IN 5 |
ETMEXTOUT[1] |
IN 6 |
ETMEXTOUT[2] |
IN 7 |
ETMEXTOUT[3] |
OUT 0 |
EDBGRQ |
OUT 1 |
DBGRESTART |
OUT 2 |
CTIIRQ |
OUT 3 |
- |
OUT 4 |
ETMEXTIN[0] |
OUT 5 |
ETMEXTIN[1] |
OUT 6 |
ETMEXTIN[2] |
OUT 7 |
ETMEXTIN[3] |