Design and Target Device Summary

All design estimate reports begin with an application summary and information about the target hardware. Device information is provided by the following section of the report:

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Design Name:             _xocc_compile_kernel_bin.dir
Target Device:           xilinx:adm-pcie-ku3:2ddr-xpr:3.3
Target Clock:            200MHz
Total number of kernels: 1
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For the design summary, the only information you provide is the design name and the selection of the target device. The other information provided in this section is the target board and the clock frequency.

The target board is the name of the board that runs the application compiled by the SDAccel™ development environment. The clock frequency defines how fast the logic runs for compute units mapped to the FPGA fabric. Both of these parameters are fixed by the device developer. These parameters cannot be modified from within the SDAccelSDAccel environment.